MerryMage
495f58eed8
A32: Implement ASIMD VSHLL
2020-06-24 23:47:13 +01:00
MerryMage
48b2ffdde9
A32: Implement ASIMD VQMOVUN, VQMOVN
2020-06-22 20:02:52 +01:00
MerryMage
3557576ece
A32: Implement ASIMD AESD, AESE, AESIMC, AESMC
2020-06-21 18:39:57 +01:00
MerryMage
809dfe9c54
A32: Implement ASIMD VCVT (between floating-point and integer)
2020-06-21 14:28:25 +01:00
MerryMage
bf093395d8
A32: Implement ASIMD VMOVN
2020-06-21 12:35:39 +01:00
MerryMage
c7785cd982
A32: Implement ASIMD VUZP and VZIP
2020-06-21 12:34:55 +01:00
MerryMage
603cd09c8f
A32: Implement ASIMD VTRN
2020-06-21 12:14:13 +01:00
Lioncash
06f7229c57
A32: Implement ASIMD VPADAL (integer)
2020-06-20 22:28:47 +01:00
Lioncash
266c6a2000
A32: Implement ASIMD VPADDL (integer)
2020-06-20 22:28:47 +01:00
MerryMage
92cb4a5a34
A32: Implement ASIMD VRSQRTE
2020-06-20 15:13:22 +01:00
MerryMage
6f59c2cd8e
A32: Implement ASIMD VRECPE
2020-06-20 15:07:06 +01:00
Lioncash
ed6ca58058
A32: Implement ASIMD VCEQ, VCGE, VCGT, VCLE, VCLT with zero
...
Fairly self-explanatory, we can leverage the existing IR functions for
the purpose of these instructions.
In the integer case, we can just insert function pointers
into an array and index it, given all comparison primitives exist
already for the integer side of things.
2020-06-20 00:50:40 +01:00
Lioncash
fbdae61c13
A32: Implement ASIMD VMVN (register)
...
Fairly straightforward
2020-06-19 11:31:14 +01:00
MerryMage
d34763242c
Revert "A32: Implement ASIMD VCEQ, VCGE, VCGT, VCLE, VCLT with zero"
...
This reverts commit 179951b10f .
These instructions require StandardFPSCRValue.
2020-06-18 17:38:40 +01:00
Lioncash
179951b10f
A32: Implement ASIMD VCEQ, VCGE, VCGT, VCLE, VCLT with zero
...
Fairly self-explanatory, we can leverage the existing IR functions for
the purpose of these instructions.
In the integer case, we can just insert function pointers
into an array and index it, given all comparison primitives exist
already for the integer side of things.
2020-06-18 17:01:57 +01:00
Lioncash
08350d06f1
A32: Implement ASIMD VQNEG
2020-06-18 09:49:29 +01:00
Lioncash
f6b665f5a4
A32: Implement ASIMD VQABS
2020-06-18 09:49:29 +01:00
Lioncash
4b371c0445
A32: Implement ASIMD VREV{16, 32, 64}
2020-06-17 10:21:59 +01:00
Lioncash
6dd2c94095
A32: Implement ASIMD VABS
...
Very similar to VNEG in that the only thing that differs is the function
called.
2020-06-16 22:42:18 +01:00
Lioncash
aabd0d824d
A32: Add immediate creation helper
...
Provides the same helper function that exists within the A64 frontend
for creating immediate values.
2020-06-16 09:54:28 +01:00
Lioncash
93ed3441b7
A32: Implement ASIMD VCLS/VCLZ/VCNT
2020-06-16 09:54:28 +01:00
Lioncash
15b3de95e4
A32: Implement VNEG
2020-06-16 01:53:21 +01:00
MerryMage
f8062345bb
asimd_two_regs_misc: Use {Get,Set}Vector
2020-05-28 21:05:30 +01:00
Lioncash
c4a4bdd7de
frontend: Relocate ExtReg handling to types.h
...
Same behavior, but deduplicates the code being placed across several
files
2020-05-24 23:55:47 +01:00
Lioncash
659d78c9c4
A32: Implement ASIMD VSWP
...
A trivial one to implement, this just swaps the contents of two
registers in place.
2020-05-22 19:43:24 +01:00