mirror of
https://git.suyu.dev/suyu/dynarmic.git
synced 2025-12-26 17:24:57 +01:00
487 lines
14 KiB
C++
487 lines
14 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "frontend/A64/translate/impl/impl.h"
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namespace Dynarmic::A64 {
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namespace {
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enum class ComparisonType {
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EQ,
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GE,
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GT,
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LE,
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LT,
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};
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bool CompareAgainstZero(TranslatorVisitor& v, bool Q, Imm<2> size, Vec Vn, Vec Vd, ComparisonType type) {
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if (size == 0b11 && !Q) {
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return v.ReservedValue();
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}
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const size_t esize = 8 << size.ZeroExtend();
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = v.V(datasize, Vn);
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const IR::U128 zero = v.ir.ZeroVector();
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IR::U128 result = [&] {
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switch (type) {
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case ComparisonType::EQ:
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return v.ir.VectorEqual(esize, operand, zero);
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case ComparisonType::GE:
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return v.ir.VectorGreaterEqualSigned(esize, operand, zero);
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case ComparisonType::GT:
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return v.ir.VectorGreaterSigned(esize, operand, zero);
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case ComparisonType::LE:
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return v.ir.VectorLessEqualSigned(esize, operand, zero);
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case ComparisonType::LT:
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default:
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return v.ir.VectorLessSigned(esize, operand, zero);
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}
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}();
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if (datasize == 64) {
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result = v.ir.VectorZeroUpper(result);
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}
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v.V(datasize, Vd, result);
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return true;
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}
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bool FPCompareAgainstZero(TranslatorVisitor& v, bool Q, bool sz, Vec Vn, Vec Vd, ComparisonType type) {
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if (sz && !Q) {
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return v.ReservedValue();
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}
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const size_t esize = sz ? 64 : 32;
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = v.V(datasize, Vn);
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const IR::U128 zero = v.ir.ZeroVector();
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const IR::U128 result = [&] {
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switch (type) {
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case ComparisonType::EQ:
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return v.ir.FPVectorEqual(esize, operand, zero);
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case ComparisonType::GE:
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return v.ir.FPVectorGreaterEqual(esize, operand, zero);
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case ComparisonType::GT:
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return v.ir.FPVectorGreater(esize, operand, zero);
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case ComparisonType::LE:
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return v.ir.FPVectorGreaterEqual(esize, zero, operand);
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case ComparisonType::LT:
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return v.ir.FPVectorGreater(esize, zero, operand);
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}
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UNREACHABLE();
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return IR::U128{};
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}();
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v.V(datasize, Vd, result);
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return true;
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}
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enum class Signedness {
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Signed,
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Unsigned
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};
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bool IntegerConvertToFloat(TranslatorVisitor& v, bool Q, bool sz, Vec Vn, Vec Vd, Signedness signedness) {
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if (sz && !Q) {
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return v.ReservedValue();
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}
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = v.V(datasize, Vn);
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const IR::U128 result = [&] {
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if (signedness == Signedness::Signed) {
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return sz ? v.ir.FPVectorS64ToDouble(operand) : v.ir.FPVectorS32ToSingle(operand);
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}
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return sz ? v.ir.FPVectorU64ToDouble(operand) : v.ir.FPVectorU32ToSingle(operand);
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}();
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v.V(datasize, Vd, result);
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return true;
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}
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bool SaturatedNarrow(TranslatorVisitor& v, bool Q, Imm<2> size, Vec Vn, Vec Vd, IR::U128 (IR::IREmitter::*fn)(size_t, const IR::U128&)) {
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if (size == 0b11) {
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return v.ReservedValue();
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}
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const size_t esize = 8 << size.ZeroExtend<size_t>();
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const size_t datasize = 64;
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const size_t part = Q ? 1 : 0;
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const IR::U128 operand = v.V(2 * datasize, Vn);
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const IR::U128 result = (v.ir.*fn)(2 * esize, operand);
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v.Vpart(datasize, Vd, part, result);
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return true;
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}
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} // Anonymous namespace
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bool TranslatorVisitor::CNT(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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if (size != 0b00) {
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return ReservedValue();
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}
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 result = ir.VectorPopulationCount(operand);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::CMGE_zero_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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return CompareAgainstZero(*this, Q, size, Vn, Vd, ComparisonType::GE);
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}
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bool TranslatorVisitor::CMGT_zero_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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return CompareAgainstZero(*this, Q, size, Vn, Vd, ComparisonType::GT);
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}
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bool TranslatorVisitor::CMEQ_zero_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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return CompareAgainstZero(*this, Q, size, Vn, Vd, ComparisonType::EQ);
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}
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bool TranslatorVisitor::CMLE_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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return CompareAgainstZero(*this, Q, size, Vn, Vd, ComparisonType::LE);
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}
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bool TranslatorVisitor::CMLT_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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return CompareAgainstZero(*this, Q, size, Vn, Vd, ComparisonType::LT);
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}
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bool TranslatorVisitor::ABS_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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if (!Q && size == 0b11) {
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return ReservedValue();
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}
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const size_t datasize = Q ? 128 : 64;
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const size_t esize = 8 << size.ZeroExtend();
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const IR::U128 data = V(datasize, Vn);
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const IR::U128 result = ir.VectorAbs(esize, data);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::XTN(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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if (size == 0b11) {
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return ReservedValue();
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}
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const size_t esize = 8 << size.ZeroExtend<size_t>();
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const size_t datasize = 64;
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const size_t part = Q ? 1 : 0;
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const IR::U128 operand = V(2 * datasize, Vn);
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const IR::U128 result = ir.VectorNarrow(2 * esize, operand);
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Vpart(datasize, Vd, part, result);
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return true;
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}
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bool TranslatorVisitor::FABS_1(bool Q, Vec Vn, Vec Vd) {
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const size_t datasize = Q ? 128 : 64;
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const size_t esize = 16;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 result = ir.FPVectorAbs(esize, operand);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::FABS_2(bool Q, bool sz, Vec Vn, Vec Vd) {
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if (sz && !Q) {
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return ReservedValue();
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}
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const size_t datasize = Q ? 128 : 64;
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const size_t esize = sz ? 64 : 32;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 result = ir.FPVectorAbs(esize, operand);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::FCMEQ_zero_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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return FPCompareAgainstZero(*this, Q, sz, Vn, Vd, ComparisonType::EQ);
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}
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bool TranslatorVisitor::FCMGE_zero_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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return FPCompareAgainstZero(*this, Q, sz, Vn, Vd, ComparisonType::GE);
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}
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bool TranslatorVisitor::FCMGT_zero_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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return FPCompareAgainstZero(*this, Q, sz, Vn, Vd, ComparisonType::GT);
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}
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bool TranslatorVisitor::FCMLE_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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return FPCompareAgainstZero(*this, Q, sz, Vn, Vd, ComparisonType::LE);
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}
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bool TranslatorVisitor::FCMLT_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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return FPCompareAgainstZero(*this, Q, sz, Vn, Vd, ComparisonType::LT);
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}
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bool TranslatorVisitor::FRECPE_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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if (sz && !Q) {
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return ReservedValue();
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}
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const size_t datasize = Q ? 128 : 64;
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const size_t esize = sz ? 64 : 32;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 result = ir.FPVectorRecipEstimate(esize, operand);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::FRSQRTE_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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if (sz && !Q) {
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return ReservedValue();
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}
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const size_t datasize = Q ? 128 : 64;
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const size_t esize = sz ? 64 : 32;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 result = ir.FPVectorRSqrtEstimate(esize, operand);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::FNEG_1(bool Q, Vec Vn, Vec Vd) {
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 mask = ir.VectorBroadcast(64, I(64, 0x8000800080008000));
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const IR::U128 result = ir.VectorEor(operand, mask);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::FNEG_2(bool Q, bool sz, Vec Vn, Vec Vd) {
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if (sz && !Q) {
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return ReservedValue();
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}
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const size_t datasize = Q ? 128 : 64;
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const size_t esize = sz ? 64 : 32;
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const size_t mask_value = esize == 64 ? 0x8000000000000000 : 0x8000000080000000;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 mask = ir.VectorBroadcast(esize, I(esize, mask_value));
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const IR::U128 result = ir.VectorEor(operand, mask);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::NEG_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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if (size == 0b11 && !Q) {
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return ReservedValue();
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}
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const size_t esize = 8 << size.ZeroExtend<size_t>();
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 zero = ir.ZeroVector();
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const IR::U128 result = ir.VectorSub(esize, zero, operand);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::SQXTUN_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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return SaturatedNarrow(*this, Q, size, Vn, Vd, &IR::IREmitter::VectorSignedSaturatedNarrowToUnsigned);
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}
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bool TranslatorVisitor::SQXTN_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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return SaturatedNarrow(*this, Q, size, Vn, Vd, &IR::IREmitter::VectorSignedSaturatedNarrowToSigned);
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}
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bool TranslatorVisitor::UQXTN_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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return SaturatedNarrow(*this, Q, size, Vn, Vd, &IR::IREmitter::VectorUnsignedSaturatedNarrow);
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}
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bool TranslatorVisitor::NOT(bool Q, Vec Vn, Vec Vd) {
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(datasize, Vn);
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IR::U128 result = ir.VectorNot(operand);
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if (datasize == 64) {
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result = ir.VectorZeroUpper(result);
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}
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::RBIT_asimd(bool Q, Vec Vn, Vec Vd) {
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 data = V(datasize, Vn);
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const IR::U128 result = ir.VectorReverseBits(data);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::REV16_asimd(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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if (size != 0) {
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return UnallocatedEncoding();
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}
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const size_t datasize = Q ? 128 : 64;
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constexpr size_t esize = 16;
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const IR::U128 data = V(datasize, Vn);
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const IR::U128 result = ir.VectorOr(ir.VectorLogicalShiftRight(esize, data, 8),
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ir.VectorLogicalShiftLeft(esize, data, 8));
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::REV32_asimd(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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const u32 zext_size = size.ZeroExtend();
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if (zext_size > 1) {
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return UnallocatedEncoding();
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}
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const size_t datasize = Q ? 128 : 64;
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const size_t esize = 16 << zext_size;
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const u8 shift = static_cast<u8>(8 << zext_size);
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const IR::U128 data = V(datasize, Vn);
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// TODO: Consider factoring byte swapping code out into its own opcode.
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// Technically the rest of the following code can be a PSHUFB
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// in the presence of SSSE3.
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IR::U128 result = ir.VectorOr(ir.VectorLogicalShiftRight(esize, data, shift),
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ir.VectorLogicalShiftLeft(esize, data, shift));
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// If dealing with 8-bit elements we'll need to shuffle the bytes in each halfword
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// e.g. Assume the following numbers point out bytes in a 32-bit word, we're essentially
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// changing [3, 2, 1, 0] to [2, 3, 0, 1]
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if (zext_size == 0) {
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result = ir.VectorShuffleLowHalfwords(result, 0b10110001);
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result = ir.VectorShuffleHighHalfwords(result, 0b10110001);
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}
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::REV64_asimd(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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const u32 zext_size = size.ZeroExtend();
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if (zext_size >= 3) {
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return UnallocatedEncoding();
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}
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const size_t datasize = Q ? 128 : 64;
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const size_t esize = 16 << zext_size;
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const u8 shift = static_cast<u8>(8 << zext_size);
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const IR::U128 data = V(datasize, Vn);
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// TODO: Consider factoring byte swapping code out into its own opcode.
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// Technically the rest of the following code can be a PSHUFB
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// in the presence of SSSE3.
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IR::U128 result = ir.VectorOr(ir.VectorLogicalShiftRight(esize, data, shift),
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ir.VectorLogicalShiftLeft(esize, data, shift));
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switch (zext_size) {
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case 0: // 8-bit elements
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result = ir.VectorShuffleLowHalfwords(result, 0b00011011);
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result = ir.VectorShuffleHighHalfwords(result, 0b00011011);
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break;
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case 1: // 16-bit elements
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result = ir.VectorShuffleLowHalfwords(result, 0b01001110);
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result = ir.VectorShuffleHighHalfwords(result, 0b01001110);
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break;
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}
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::UADDLP(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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if (size == 0b11) {
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return ReservedValue();
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}
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const size_t esize = 8 << size.ZeroExtend();
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(datasize, Vn);
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IR::U128 result = ir.VectorPairedAddUnsignedWiden(esize, operand);
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if (datasize == 64) {
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result = ir.VectorZeroUpper(result);
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}
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::SADDLP(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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if (size == 0b11) {
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return ReservedValue();
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}
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const size_t esize = 8 << size.ZeroExtend();
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(datasize, Vn);
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IR::U128 result = ir.VectorPairedAddSignedWiden(esize, operand);
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if (datasize == 64) {
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result = ir.VectorZeroUpper(result);
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}
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::SCVTF_int_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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return IntegerConvertToFloat(*this, Q, sz, Vn, Vd, Signedness::Signed);
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}
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bool TranslatorVisitor::UCVTF_int_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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return IntegerConvertToFloat(*this, Q, sz, Vn, Vd, Signedness::Unsigned);
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}
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bool TranslatorVisitor::SHLL(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
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if (size == 0b11) {
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return ReservedValue();
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}
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const size_t esize = 8 << size.ZeroExtend();
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const IR::U128 operand = ir.VectorZeroExtend(esize, Vpart(64, Vn, Q));
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const IR::U128 result = ir.VectorLogicalShiftLeft(esize * 2, operand, static_cast<u8>(esize));
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V(128, Vd, result);
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return true;
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}
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} // namespace Dynarmic::A64
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