Suyu/dynarmic
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/dynarmic.git synced 2026-01-03 13:14:42 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions
dynarmic/src/frontend/A32/translate/impl
History
Lioncash ed6ca58058 A32: Implement ASIMD VCEQ, VCGE, VCGT, VCLE, VCLT with zero 
Fairly self-explanatory, we can leverage the existing IR functions for
the purpose of these instructions.

In the integer case, we can just insert function pointers
into an array and index it, given all comparison primitives exist
already for the integer side of things.
2020-06-20 00:50:40 +01:00
..
asimd_load_store_structures.cpp frontend: Relocate ExtReg handling to types.h 2020-05-24 23:55:47 +01:00
asimd_one_reg_modified_immediate.cpp asimd_one_reg_modified_immediate: Use {Get,Set}Vector 2020-05-28 20:40:26 +01:00
asimd_three_same.cpp A32: Implement ASIMD VRSHL 2020-06-19 21:27:48 +01:00
asimd_two_regs_misc.cpp A32: Implement ASIMD VCEQ, VCGE, VCGT, VCLE, VCLT with zero 2020-06-20 00:50:40 +01:00
asimd_two_regs_shift.cpp asimd: Prevent misdecodes from occurring 2020-06-18 15:04:48 -04:00
barrier.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
branch.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
coprocessor.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
crc32.cpp crc32: Remove unnecessary masking 2020-06-04 20:33:46 +01:00
data_processing.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
divide.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
exception_generating.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
extension.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
hint.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
load_store.cpp fuzz_arm: Ensure all instructions are fuzzed 2020-05-10 13:57:39 +01:00
misc.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
multiply.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
packing.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
parallel.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
reversal.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
saturated.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
status_register_access.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
synchronization.cpp A32 global exlcusive monitor 2020-06-16 17:54:21 +01:00
thumb16.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
thumb32.cpp Relicense to 0BSD 2020-04-23 15:45:57 +01:00
translate_arm.h A32: Implement ASIMD VCEQ, VCGE, VCGT, VCLE, VCLT with zero 2020-06-20 00:50:40 +01:00
translate_thumb.h Relicense to 0BSD 2020-04-23 15:45:57 +01:00
vfp.cpp ir_emitter: Default fpcr_controlled arguments to true 2020-06-19 22:51:23 +01:00