dynarmic/src/frontend/A32
MerryMage f73104633b a32_emit_x64: Fix incorrect BMI2 implementation for SetCpsr
* The MSB for each byte in cpsr_ge were not being appropriately set.
* We also expand test coverage to test this case.
* We fix the disassembly of the MSR (imm) and MSR (reg) instructions as well.
2020-04-22 20:53:46 +01:00
..
decoder status_register_access: Add support for bits 0 and 1 of mask to MSR 2020-04-22 20:46:23 +01:00
disassembler a32_emit_x64: Fix incorrect BMI2 implementation for SetCpsr 2020-04-22 20:53:46 +01:00
translate status_register_access: Add support for bits 0 and 1 of mask to MSR 2020-04-22 20:46:23 +01:00
FPSCR.h fp: Extract common RoundingMode enum 2020-04-22 20:46:18 +01:00
ir_emitter.cpp ir/value: Use type alias CoprocessorInfo for std::array<u8, 8> 2020-04-22 20:46:23 +01:00
ir_emitter.h IR: FPCompare{32,64} now return NZCV flags instead of implicitly setting them 2020-04-22 20:46:13 +01:00
location_descriptor.cpp General: Convert multiple namespace specifiers to nested namespace specifiers where applicable 2020-04-22 20:44:38 +01:00
location_descriptor.h General: Convert multiple namespace specifiers to nested namespace specifiers where applicable 2020-04-22 20:44:38 +01:00
PSR.h General: Convert multiple namespace specifiers to nested namespace specifiers where applicable 2020-04-22 20:44:38 +01:00
types.cpp General: Convert multiple namespace specifiers to nested namespace specifiers where applicable 2020-04-22 20:44:38 +01:00
types.h General: Convert multiple namespace specifiers to nested namespace specifiers where applicable 2020-04-22 20:44:38 +01:00