MerryMage b8daa4feac simd_two_register_misc: FNEG (vector) with Q == 0 had dirty upper		2020-04-22 20:55:05 +01:00
..
A32	A32: Implement FastDispatchHint	2020-04-22 20:53:46 +01:00
A64	simd_two_register_misc: FNEG (vector) with Q == 0 had dirty upper	2020-04-22 20:55:05 +01:00
decoder	mp: rename mp.h to mp/function_info.h	2020-04-22 20:46:22 +01:00
ir	ir: Add opcodes form unsigned saturated accumulations of signed values	2020-04-22 20:55:05 +01:00