MerryMage d34763242c Revert "A32: Implement ASIMD VCEQ, VCGE, VCGT, VCLE, VCLT with zero" ... This reverts commit 179951b10f. These instructions require StandardFPSCRValue.		2020-06-18 17:38:40 +01:00
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A32	Revert "A32: Implement ASIMD VCEQ, VCGE, VCGT, VCLE, VCLT with zero"	2020-06-18 17:38:40 +01:00
A64	A32: Implement ASIMD VQSUB instruction	2020-05-30 18:19:17 +01:00
decoder	decoder_detail: Mark GetMaskAndExpect() as constexpr	2020-05-11 08:29:06 +01:00
ir	A32 global exlcusive monitor	2020-06-16 17:54:21 +01:00
imm.cpp	frontend: Relocate advanced SIMD expansion to a common file	2020-05-24 23:55:47 +01:00
imm.h	frontend: Relocate advanced SIMD expansion to a common file	2020-05-24 23:55:47 +01:00