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Unfortunately x86 prior to AVX-512 doesn't really give us any convenient instruction to do the work for us
258 lines
8.6 KiB
C++
258 lines
8.6 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include <type_traits>
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#include "backend_x64/abi.h"
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#include "backend_x64/block_of_code.h"
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#include "backend_x64/emit_x64.h"
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#include "common/bit_util.h"
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#include "common/fp_util.h"
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#include "frontend/ir/basic_block.h"
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#include "frontend/ir/microinstruction.h"
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namespace Dynarmic::BackendX64 {
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using namespace Xbyak::util;
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template <typename T>
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struct NaNWrapper;
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template <>
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struct NaNWrapper<u32> {
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static constexpr u32 value = 0x7fc00000;
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};
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template <>
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struct NaNWrapper<u64> {
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static constexpr u64 value = 0x7ff8'0000'0000'0000;
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};
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template <typename T>
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static void HandleNaNs(BlockOfCode& code, EmitContext& ctx, const Xbyak::Xmm& xmm_a,
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const Xbyak::Xmm& xmm_b, const Xbyak::Xmm& result, const Xbyak::Xmm& nan_mask) {
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static_assert(std::is_same_v<T, u32> || std::is_same_v<T, u64>, "T must be either u32 or u64");
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if (code.DoesCpuSupport(Xbyak::util::Cpu::tSSE41)) {
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code.ptest(nan_mask, nan_mask);
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} else {
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const Xbyak::Reg32 bitmask = ctx.reg_alloc.ScratchGpr().cvt32();
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code.movmskps(bitmask, nan_mask);
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code.cmp(bitmask, 0);
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}
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Xbyak::Label end;
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Xbyak::Label nan;
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code.jz(end);
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code.jmp(nan, code.T_NEAR);
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code.L(end);
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code.SwitchToFarCode();
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code.L(nan);
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code.sub(rsp, 8);
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ABI_PushCallerSaveRegistersAndAdjustStackExcept(code, HostLocXmmIdx(result.getIdx()));
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const size_t stack_space = 3 * 16;
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code.sub(rsp, stack_space + ABI_SHADOW_SPACE);
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code.lea(code.ABI_PARAM1, ptr[rsp + ABI_SHADOW_SPACE + 0 * 16]);
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code.lea(code.ABI_PARAM2, ptr[rsp + ABI_SHADOW_SPACE + 1 * 16]);
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code.lea(code.ABI_PARAM3, ptr[rsp + ABI_SHADOW_SPACE + 2 * 16]);
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code.movaps(xword[code.ABI_PARAM1], result);
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code.movaps(xword[code.ABI_PARAM2], xmm_a);
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code.movaps(xword[code.ABI_PARAM3], xmm_b);
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using Elements = std::integral_constant<size_t, 128 / Common::BitSize<T>()>;
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using RegArray = std::array<T, Elements::value>;
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code.CallFunction(static_cast<void(*)(RegArray&, const RegArray&, const RegArray&)>(
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[](RegArray& result, const RegArray& a, const RegArray& b) {
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for (size_t i = 0; i < result.size(); ++i) {
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if (auto r = Common::ProcessNaNs(a[i], b[i])) {
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result[i] = *r;
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} else if (Common::IsNaN(result[i])) {
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result[i] = NaNWrapper<T>::value;
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}
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}
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}
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));
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code.movaps(result, xword[rsp + ABI_SHADOW_SPACE + 0 * 16]);
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code.add(rsp, stack_space + ABI_SHADOW_SPACE);
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ABI_PopCallerSaveRegistersAndAdjustStackExcept(code, HostLocXmmIdx(result.getIdx()));
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code.add(rsp, 8);
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code.jmp(end, code.T_NEAR);
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code.SwitchToNearCode();
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}
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template <typename Function>
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static void EmitVectorOperation32(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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if (!ctx.AccurateNaN() || ctx.FPSCR_DN()) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(args[0]);
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Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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(code.*fn)(xmm_a, xmm_b);
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if (ctx.FPSCR_DN()) {
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Xbyak::Xmm nan_mask = ctx.reg_alloc.ScratchXmm();
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Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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code.pcmpeqw(tmp, tmp);
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code.movaps(nan_mask, xmm_a);
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code.cmpordps(nan_mask, nan_mask);
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code.andps(xmm_a, nan_mask);
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code.xorps(nan_mask, tmp);
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code.andps(nan_mask, code.MConst(xword, 0x7fc0'0000'7fc0'0000, 0x7fc0'0000'7fc0'0000));
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code.orps(xmm_a, nan_mask);
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}
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ctx.reg_alloc.DefineValue(inst, xmm_a);
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return;
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}
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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Xbyak::Xmm xmm_a = ctx.reg_alloc.UseXmm(args[0]);
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Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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Xbyak::Xmm nan_mask = ctx.reg_alloc.ScratchXmm();
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code.movaps(nan_mask, xmm_b);
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code.movaps(result, xmm_a);
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code.cmpunordps(nan_mask, xmm_a);
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(code.*fn)(result, xmm_b);
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code.cmpunordps(nan_mask, result);
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HandleNaNs<u32>(code, ctx, xmm_a, xmm_b, result, nan_mask);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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template <typename Function>
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static void EmitVectorOperation64(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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if (!ctx.AccurateNaN() || ctx.FPSCR_DN()) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(args[0]);
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Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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(code.*fn)(xmm_a, xmm_b);
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if (ctx.FPSCR_DN()) {
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Xbyak::Xmm nan_mask = ctx.reg_alloc.ScratchXmm();
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Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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code.pcmpeqw(tmp, tmp);
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code.movaps(nan_mask, xmm_a);
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code.cmpordpd(nan_mask, nan_mask);
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code.andps(xmm_a, nan_mask);
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code.xorps(nan_mask, tmp);
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code.andps(nan_mask, code.MConst(xword, 0x7ff8'0000'0000'0000, 0x7ff8'0000'0000'0000));
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code.orps(xmm_a, nan_mask);
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}
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ctx.reg_alloc.DefineValue(inst, xmm_a);
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return;
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}
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Label end, nan;
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Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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Xbyak::Xmm xmm_a = ctx.reg_alloc.UseXmm(args[0]);
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Xbyak::Xmm xmm_b = ctx.reg_alloc.UseXmm(args[1]);
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Xbyak::Xmm nan_mask = ctx.reg_alloc.ScratchXmm();
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code.movaps(nan_mask, xmm_b);
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code.movaps(result, xmm_a);
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code.cmpunordpd(nan_mask, xmm_a);
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(code.*fn)(result, xmm_b);
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code.cmpunordpd(nan_mask, result);
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HandleNaNs<u64>(code, ctx, xmm_a, xmm_b, result, nan_mask);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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void EmitX64::EmitFPVectorAdd32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32(code, ctx, inst, &Xbyak::CodeGenerator::addps);
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}
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void EmitX64::EmitFPVectorAdd64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64(code, ctx, inst, &Xbyak::CodeGenerator::addpd);
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}
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void EmitX64::EmitFPVectorDiv32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32(code, ctx, inst, &Xbyak::CodeGenerator::divps);
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}
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void EmitX64::EmitFPVectorDiv64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64(code, ctx, inst, &Xbyak::CodeGenerator::divpd);
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}
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void EmitX64::EmitFPVectorMul32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32(code, ctx, inst, &Xbyak::CodeGenerator::mulps);
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}
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void EmitX64::EmitFPVectorMul64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64(code, ctx, inst, &Xbyak::CodeGenerator::mulpd);
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}
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void EmitX64::EmitFPVectorS32ToSingle(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm xmm = ctx.reg_alloc.UseScratchXmm(args[0]);
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code.cvtdq2ps(xmm, xmm);
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ctx.reg_alloc.DefineValue(inst, xmm);
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}
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void EmitX64::EmitFPVectorS64ToDouble(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm xmm = ctx.reg_alloc.UseScratchXmm(args[0]);
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if (code.DoesCpuSupport(Xbyak::util::Cpu::tAVX512VL) && code.DoesCpuSupport(Xbyak::util::Cpu::tAVX512DQ)) {
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code.vcvtqq2pd(xmm, xmm);
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} else if (code.DoesCpuSupport(Xbyak::util::Cpu::tSSE41)) {
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const Xbyak::Xmm xmm_tmp = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg64 tmp = ctx.reg_alloc.ScratchGpr();
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// First quadword
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code.movq(tmp, xmm);
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code.cvtsi2sd(xmm, tmp);
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// Second quadword
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code.pextrq(tmp, xmm, 1);
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code.cvtsi2sd(xmm_tmp, tmp);
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// Combine
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code.unpcklpd(xmm, xmm_tmp);
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} else {
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const Xbyak::Xmm high_xmm = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm xmm_tmp = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg64 tmp = ctx.reg_alloc.ScratchGpr();
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// First quadword
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code.movhlps(high_xmm, xmm);
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code.movq(tmp, xmm);
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code.cvtsi2sd(xmm, tmp);
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// Second quadword
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code.movq(tmp, high_xmm);
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code.cvtsi2sd(xmm_tmp, tmp);
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// Combine
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code.unpcklpd(xmm, xmm_tmp);
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}
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ctx.reg_alloc.DefineValue(inst, xmm);
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}
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void EmitX64::EmitFPVectorSub32(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation32(code, ctx, inst, &Xbyak::CodeGenerator::subps);
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}
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void EmitX64::EmitFPVectorSub64(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation64(code, ctx, inst, &Xbyak::CodeGenerator::subpd);
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}
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} // namespace Dynarmic::BackendX64
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