/* This file is part of the dynarmic project. * Copyright (c) 2018 MerryMage * This software may be used and distributed according to the terms of the GNU * General Public License version 2 or any later version. */ #include "common/bit_util.h" #include "frontend/A64/translate/impl/impl.h" namespace Dynarmic::A64 { bool TranslatorVisitor::SSHR_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { if (immh == 0b0000) { return DecodeError(); } if (immh.Bit<3>() && !Q) { return ReservedValue(); } const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 shift_amount = static_cast(2 * esize) - concatenate(immh, immb).ZeroExtend(); const IR::U128 operand = V(datasize, Vn); const IR::U128 result = ir.VectorArithmeticShiftRight(esize, operand, shift_amount); V(datasize, Vd, result); return true; } bool TranslatorVisitor::SSRA_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { if (immh == 0b0000) { return DecodeError(); } if (immh.Bit<3>() && !Q) { return ReservedValue(); } const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 shift_amount = static_cast(2 * esize) - concatenate(immh, immb).ZeroExtend(); const IR::U128 operand = V(datasize, Vn); const IR::U128 operand2 = V(datasize, Vd); const IR::U128 shifted_operand = ir.VectorArithmeticShiftRight(esize, operand, shift_amount); const IR::U128 result = ir.VectorAdd(esize, shifted_operand, operand2); V(datasize, Vd, result); return true; } bool TranslatorVisitor::SHL_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { if (immh == 0b0000) { return DecodeError(); } if (immh.Bit<3>() && !Q) { return ReservedValue(); } const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 shift_amount = concatenate(immh, immb).ZeroExtend() - static_cast(esize); const IR::U128 operand = V(datasize, Vn); const IR::U128 result = ir.VectorLogicalShiftLeft(esize, operand, shift_amount); V(datasize, Vd, result); return true; } bool TranslatorVisitor::USHR_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { if (immh == 0b0000) { return DecodeError(); } if (immh.Bit<3>() && !Q) { return ReservedValue(); } const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 shift_amount = static_cast(2 * esize) - concatenate(immh, immb).ZeroExtend(); const IR::U128 operand = V(datasize, Vn); const IR::U128 result = ir.VectorLogicalShiftRight(esize, operand, shift_amount); V(datasize, Vd, result); return true; } bool TranslatorVisitor::USRA_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { if (immh == 0b0000) { return DecodeError(); } if (immh.Bit<3>() && !Q) { return ReservedValue(); } const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 shift_amount = static_cast(2 * esize) - concatenate(immh, immb).ZeroExtend(); const IR::U128 operand = V(datasize, Vn); const IR::U128 operand2 = V(datasize, Vd); const IR::U128 shifted_operand = ir.VectorLogicalShiftRight(esize, operand, shift_amount); const IR::U128 result = ir.VectorAdd(esize, shifted_operand, operand2); V(datasize, Vd, result); return true; } bool TranslatorVisitor::USHLL(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { if (immh == 0b0000) { return DecodeError(); } if (immh.Bit<3>()) { return ReservedValue(); } const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); const size_t datasize = 64; const size_t part = Q ? 1 : 0; const u8 shift_amount = concatenate(immh, immb).ZeroExtend() - static_cast(esize); const IR::U128 operand = Vpart(datasize, Vn, part); const IR::U128 expanded_operand = ir.VectorZeroExtend(esize, operand); const IR::U128 result = ir.VectorLogicalShiftLeft(2 * esize, expanded_operand, shift_amount); V(2 * datasize, Vd, result); return true; } } // namespace Dynarmic::A64