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Merge pull request #442 from lioncash/fcvtxn
A64: Implement scalar and vector variants of FCVTXN
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commit
fb039e232c
14 changed files with 210 additions and 32 deletions
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@ -348,10 +348,11 @@ bool TranslatorVisitor::FCVTL(bool Q, bool sz, Vec Vn, Vec Vd) {
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}
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const IR::U128 part = Vpart(64, Vn, Q);
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const auto rounding_mode = ir.current_location->FPCR().RMode();
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IR::U128 result = ir.ZeroVector();
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for (size_t i = 0; i < 2; i++) {
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const IR::U64 element = ir.FPSingleToDouble(ir.VectorGetElement(32, part, i), true);
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const IR::U64 element = ir.FPSingleToDouble(ir.VectorGetElement(32, part, i), rounding_mode);
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result = ir.VectorSetElement(64, result, i, element);
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}
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@ -367,10 +368,11 @@ bool TranslatorVisitor::FCVTN(bool Q, bool sz, Vec Vn, Vec Vd) {
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}
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const IR::U128 operand = V(128, Vn);
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const auto rounding_mode = ir.current_location->FPCR().RMode();
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IR::U128 result = ir.ZeroVector();
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for (size_t i = 0; i < 2; i++) {
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const IR::U32 element = ir.FPDoubleToSingle(ir.VectorGetElement(64, operand, i), true);
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const IR::U32 element = ir.FPDoubleToSingle(ir.VectorGetElement(64, operand, i), rounding_mode);
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result = ir.VectorSetElement(32, result, i, element);
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}
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@ -395,6 +397,26 @@ bool TranslatorVisitor::FCVTPS_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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return FloatConvertToInteger(*this, Q, sz, Vn, Vd, Signedness::Signed, FP::RoundingMode::TowardsPlusInfinity);
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}
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bool TranslatorVisitor::FCVTXN_2(bool Q, bool sz, Vec Vn, Vec Vd) {
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if (!sz) {
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return UnallocatedEncoding();
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}
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const size_t part = Q ? 1 : 0;
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const auto operand = ir.GetQ(Vn);
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auto result = ir.ZeroVector();
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for (size_t e = 0; e < 2; ++e) {
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const IR::U64 element = ir.VectorGetElement(64, operand, e);
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const IR::U32 converted = ir.FPDoubleToSingle(element, FP::RoundingMode::ToOdd);
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result = ir.VectorSetElement(32, result, e, converted);
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}
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Vpart(64, Vd, part, result);
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return true;
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}
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bool TranslatorVisitor::FCVTZS_int_4(bool Q, bool sz, Vec Vn, Vec Vd) {
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return FloatConvertToInteger(*this, Q, sz, Vn, Vd, Signedness::Signed, FP::RoundingMode::TowardsZero);
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}
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