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A64: Implement SIMD instruction SSHR, vector variant

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MerryMage 2018-02-10 23:28:05 +00:00
parent 715ae1c229
commit f58aba9871
2 changed files with 20 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -778,7 +778,7 @@ INST(MOVI, "MOVI, MVNI, ORR, BIC (vector, immediate)", "0Qo01
//INST(FMOV_2, "FMOV (vector, immediate)", "0Q00111100000abc111111defghddddd")
// Data Processing - FP and SIMD - SIMD Shift by immediate
//INST(SSHR_2, "SSHR", "0Q0011110IIIIiii000001nnnnnddddd")
INST(SSHR_2, "SSHR", "0Q0011110IIIIiii000001nnnnnddddd")
//INST(SSRA_2, "SSRA", "0Q0011110IIIIiii000101nnnnnddddd")
//INST(SRSHR_2, "SRSHR", "0Q0011110IIIIiii001001nnnnnddddd")
//INST(SRSRA_2, "SRSRA", "0Q0011110IIIIiii001101nnnnnddddd")