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A64: Implement ISB

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Given we want to ensure that all instructions are fetched again, we can
treat an ISB instruction as a code cache flush.
This commit is contained in:
Lioncash 2018-08-17 20:20:42 -04:00 • committed by MerryMage
parent be53e356a2
commit f3f60cd179
9 changed files with 45 additions and 20 deletions
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src/frontend/ir/opcodes.inc
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@ -66,6 +66,7 @@ A64OPC(ExceptionRaised, T::Void, T::U64,
A64OPC(DataCacheOperationRaised, T::Void, T::U64, T::U64 )
A64OPC(DataSynchronizationBarrier, T::Void, )
A64OPC(DataMemoryBarrier, T::Void, )
A64OPC(InstructionSynchronizationBarrier, T::Void, )
A64OPC(GetCNTFRQ, T::U32, )
A64OPC(GetCNTPCT, T::U64, )
A64OPC(GetCTR, T::U32, )