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A64: Implement ISB

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Given we want to ensure that all instructions are fetched again, we can
treat an ISB instruction as a code cache flush.
This commit is contained in:
Lioncash 2018-08-17 20:20:42 -04:00 • committed by MerryMage
parent be53e356a2
commit f3f60cd179
9 changed files with 45 additions and 20 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -64,7 +64,7 @@ INST(SEVL, "SEVL", "11010
INST(CLREX, "CLREX", "11010101000000110011MMMM01011111")
INST(DSB, "DSB", "11010101000000110011MMMM10011111")
INST(DMB, "DMB", "11010101000000110011MMMM10111111")
//INST(ISB, "ISB", "11010101000000110011MMMM11011111")
INST(ISB, "ISB", "11010101000000110011MMMM11011111")
//INST(SYS, "SYS", "1101010100001oooNNNNMMMMooottttt")
INST(MSR_reg, "MSR (register)", "110101010001poooNNNNMMMMooottttt")
//INST(SYSL, "SYSL", "1101010100101oooNNNNMMMMooottttt")