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A32: Implement ASIMD VQSUB instruction

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This commit is contained in:
MerryMage 2020-05-30 16:10:51 +01:00
parent 16ff880f8f
commit f3845cea9a
8 changed files with 157 additions and 184 deletions
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6
src/frontend/A64/translate/impl/simd_three_same.cpp
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@ -335,7 +335,7 @@ bool SaturatingArithmeticOperation(TranslatorVisitor& v, bool Q, Imm<2> size, Ve
const IR::U128 operand1 = v.V(datasize, Vn);
const IR::U128 operand2 = v.V(datasize, Vm);
const auto result = [&] {
const IR::U128 result = [&] {
if (sign == Signedness::Signed) {
if (op == Operation::Add) {
return v.ir.VectorSignedSaturatedAdd(esize, operand1, operand2);
@ -351,9 +351,7 @@ bool SaturatingArithmeticOperation(TranslatorVisitor& v, bool Q, Imm<2> size, Ve
return v.ir.VectorUnsignedSaturatedSub(esize, operand1, operand2);
}();
v.ir.OrQC(result.overflow);
v.V(datasize, Vd, result.result);
v.V(datasize, Vd, result);
return true;
}