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A32: Add ExceptionRaised IR instruction and use it

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This commit is contained in:
MerryMage 2018-01-28 12:55:47 +00:00
parent 7ffbebf290
commit f023bbb893
7 changed files with 32 additions and 2 deletions
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4
src/frontend/A32/ir_emitter.cpp
View file

@ -86,6 +86,10 @@ void IREmitter::CallSupervisor(const IR::U32& value) {
Inst(Opcode::A32CallSupervisor, value);
}
void IREmitter::ExceptionRaised(const Exception exception) {
Inst(Opcode::A64ExceptionRaised, Imm32(PC()), Imm64(static_cast<u64>(exception)));
}
IR::U32 IREmitter::GetCpsr() {
return Inst<IR::U32>(Opcode::A32GetCpsr);
}

4
src/frontend/A32/ir_emitter.h
View file

@ -18,6 +18,8 @@
namespace Dynarmic::A32 {
enum class Exception;
/**
* Convenience class to construct a basic block of the intermediate representation.
* `block` is the resulting block.
@ -41,7 +43,9 @@ public:
void BranchWritePC(const IR::U32& value);
void BXWritePC(const IR::U32& value);
void LoadWritePC(const IR::U32& value);
void CallSupervisor(const IR::U32& value);
void ExceptionRaised(Exception exception);
IR::U32 GetCpsr();
void SetCpsr(const IR::U32& value);

10
src/frontend/A32/translate/translate_arm.cpp
View file

@ -7,6 +7,7 @@
#include <algorithm>
#include "common/assert.h"
#include "dynarmic/A32/config.h"
#include "frontend/A32/decoder/arm.h"
#include "frontend/A32/decoder/vfp2.h"
#include "frontend/A32/location_descriptor.h"
@ -117,7 +118,14 @@ bool ArmTranslatorVisitor::InterpretThisInstruction() {
}
bool ArmTranslatorVisitor::UnpredictableInstruction() {
ASSERT_MSG(false, "UNPREDICTABLE");
ir.ExceptionRaised(Exception::UnpredictableInstruction);
ir.SetTerm(IR::Term::CheckHalt{IR::Term::ReturnToDispatch{}});
return false;
}
bool ArmTranslatorVisitor::UndefinedInstruction() {
ir.ExceptionRaised(Exception::UndefinedInstruction);
ir.SetTerm(IR::Term::CheckHalt{IR::Term::ReturnToDispatch{}});
return false;
}

2
src/frontend/A32/translate/translate_arm/exception_generating.cpp
View file

@ -26,7 +26,7 @@ bool ArmTranslatorVisitor::arm_SVC(Cond cond, Imm24 imm24) {
}
bool ArmTranslatorVisitor::arm_UDF() {
return InterpretThisInstruction();
return UndefinedInstruction();
}
} // namespace Dynarmic::A32

1
src/frontend/A32/translate/translate_arm/translate_arm.h
View file

@ -35,6 +35,7 @@ struct ArmTranslatorVisitor final {
bool ConditionPassed(Cond cond);
bool InterpretThisInstruction();
bool UnpredictableInstruction();
bool UndefinedInstruction();
static u32 rotr(u32 x, int shift) {
shift &= 31;

1
src/frontend/ir/opcodes.inc
View file

@ -29,6 +29,7 @@ A32OPC(SetGEFlags, T::Void, T::U32
A32OPC(SetGEFlagsCompressed, T::Void, T::U32 )
A32OPC(BXWritePC, T::Void, T::U32 )
A32OPC(CallSupervisor, T::Void, T::U32 )
A32OPC(ExceptionRaised, T::Void, T::U32, T::U64 )
A32OPC(GetFpscr, T::U32, )
A32OPC(SetFpscr, T::Void, T::U32, )
A32OPC(GetFpscrNZCV, T::U32, )