mirror of
https://git.suyu.dev/suyu/dynarmic.git
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Port x64 backend to xbyak
This commit is contained in:
MerryMage
parent
611cffb612
commit
e32812cd00
25 changed files with 1638 additions and 5323 deletions
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@ -7,52 +7,42 @@
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#include <algorithm>
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#include <map>
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#include <xbyak.h>
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#include "backend_x64/jitstate.h"
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#include "backend_x64/reg_alloc.h"
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#include "common/assert.h"
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#include "common/x64/emitter.h"
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namespace Dynarmic {
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namespace BackendX64 {
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static Gen::OpArg ImmediateToOpArg(const IR::Value& imm) {
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static u32 ImmediateToU32(const IR::Value& imm) {
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switch (imm.GetType()) {
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case IR::Type::U1:
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return Gen::Imm32(imm.GetU1());
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return u32(imm.GetU1());
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break;
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case IR::Type::U8:
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return Gen::Imm32(imm.GetU8());
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return u32(imm.GetU8());
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break;
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case IR::Type::U32:
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return Gen::Imm32(imm.GetU32());
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return u32(imm.GetU32());
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break;
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default:
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ASSERT_MSG(false, "This should never happen.");
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}
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}
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static Gen::X64Reg HostLocToX64(HostLoc loc) {
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DEBUG_ASSERT(HostLocIsRegister(loc));
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DEBUG_ASSERT(loc != HostLoc::RSP);
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// HostLoc is ordered such that the numbers line up.
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if (HostLocIsGPR(loc)) {
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return static_cast<Gen::X64Reg>(loc);
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static Xbyak::Reg HostLocToX64(HostLoc hostloc) {
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if (HostLocIsGPR(hostloc)) {
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return HostLocToReg64(hostloc);
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}
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if (HostLocIsXMM(loc)) {
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return static_cast<Gen::X64Reg>(size_t(loc) - size_t(HostLoc::XMM0));
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if (HostLocIsXMM(hostloc)) {
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return HostLocToXmm(hostloc);
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}
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ASSERT_MSG(false, "This should never happen.");
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return Gen::INVALID_REG;
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}
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static Gen::OpArg SpillToOpArg(HostLoc loc) {
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static_assert(std::is_same<decltype(JitState{nullptr}.Spill[0]), u64&>::value, "Spill must be u64");
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DEBUG_ASSERT(HostLocIsSpill(loc));
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size_t i = static_cast<size_t>(loc) - static_cast<size_t>(HostLoc::FirstSpill);
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return Gen::MDisp(Gen::R15, static_cast<int>(offsetof(JitState, Spill) + i * sizeof(u64)));
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}
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Gen::X64Reg RegAlloc::DefRegister(IR::Inst* def_inst, HostLocList desired_locations) {
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HostLoc RegAlloc::DefHostLocReg(IR::Inst* def_inst, HostLocList desired_locations) {
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DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
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DEBUG_ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
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@ -66,14 +56,14 @@ Gen::X64Reg RegAlloc::DefRegister(IR::Inst* def_inst, HostLocList desired_locati
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LocInfo(location).def = def_inst;
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DEBUG_ASSERT(LocInfo(location).IsDef());
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return HostLocToX64(location);
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return location;
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}
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void RegAlloc::RegisterAddDef(IR::Inst* def_inst, const IR::Value& use_inst) {
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DEBUG_ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
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if (use_inst.IsImmediate()) {
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LoadImmediateIntoRegister(use_inst, DefRegister(def_inst, any_gpr));
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LoadImmediateIntoHostLocReg(use_inst, DefHostLocReg(def_inst, any_gpr));
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return;
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}
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@ -84,15 +74,15 @@ void RegAlloc::RegisterAddDef(IR::Inst* def_inst, const IR::Value& use_inst) {
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DEBUG_ASSERT(LocInfo(location).IsIdle());
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}
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Gen::X64Reg RegAlloc::UseDefRegister(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations) {
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HostLoc RegAlloc::UseDefHostLocReg(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations) {
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if (!use_value.IsImmediate()) {
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return UseDefRegister(use_value.GetInst(), def_inst, desired_locations);
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return UseDefHostLocReg(use_value.GetInst(), def_inst, desired_locations);
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}
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return LoadImmediateIntoRegister(use_value, DefRegister(def_inst, desired_locations));
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return LoadImmediateIntoHostLocReg(use_value, DefHostLocReg(def_inst, desired_locations));
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}
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Gen::X64Reg RegAlloc::UseDefRegister(IR::Inst* use_inst, IR::Inst* def_inst, HostLocList desired_locations) {
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HostLoc RegAlloc::UseDefHostLocReg(IR::Inst* use_inst, IR::Inst* def_inst, HostLocList desired_locations) {
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DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
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DEBUG_ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
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DEBUG_ASSERT_MSG(ValueLocation(use_inst), "use_inst has not been defined");
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@ -112,9 +102,9 @@ Gen::X64Reg RegAlloc::UseDefRegister(IR::Inst* use_inst, IR::Inst* def_inst, Hos
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EmitMove(new_location, current_location);
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LocInfo(new_location) = LocInfo(current_location);
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LocInfo(current_location) = {};
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return HostLocToX64(new_location);
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return new_location;
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} else {
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return HostLocToX64(current_location);
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return current_location;
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}
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}
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}
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@ -122,17 +112,17 @@ Gen::X64Reg RegAlloc::UseDefRegister(IR::Inst* use_inst, IR::Inst* def_inst, Hos
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bool is_floating_point = HostLocIsXMM(*desired_locations.begin());
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if (is_floating_point)
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DEBUG_ASSERT(use_inst->GetType() == IR::Type::F32 || use_inst->GetType() == IR::Type::F64);
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Gen::X64Reg use_reg = UseRegister(use_inst, is_floating_point ? any_xmm : any_gpr);
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Gen::X64Reg def_reg = DefRegister(def_inst, desired_locations);
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HostLoc use_reg = UseHostLocReg(use_inst, is_floating_point ? any_xmm : any_gpr);
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HostLoc def_reg = DefHostLocReg(def_inst, desired_locations);
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if (is_floating_point) {
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code->MOVAPD(def_reg, Gen::R(use_reg));
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code->movapd(HostLocToXmm(def_reg), HostLocToXmm(use_reg));
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} else {
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code->MOV(64, Gen::R(def_reg), Gen::R(use_reg));
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code->mov(HostLocToReg64(def_reg), HostLocToReg64(use_reg));
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}
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return def_reg;
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}
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std::tuple<Gen::OpArg, Gen::X64Reg> RegAlloc::UseDefOpArg(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations) {
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std::tuple<OpArg, HostLoc> RegAlloc::UseDefOpArgHostLocReg(IR::Value use_value, IR::Inst* def_inst, HostLocList desired_locations) {
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DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
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DEBUG_ASSERT_MSG(!ValueLocation(def_inst), "def_inst has already been defined");
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DEBUG_ASSERT_MSG(use_value.IsImmediate() || ValueLocation(use_value.GetInst()), "use_inst has not been defined");
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@ -147,37 +137,37 @@ std::tuple<Gen::OpArg, Gen::X64Reg> RegAlloc::UseDefOpArg(IR::Value use_value, I
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if (HostLocIsSpill(current_location)) {
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loc_info.is_being_used = true;
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DEBUG_ASSERT(loc_info.IsUse());
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return std::make_tuple(SpillToOpArg(current_location), DefRegister(def_inst, desired_locations));
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return std::make_tuple(SpillToOpArg(current_location), DefHostLocReg(def_inst, desired_locations));
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} else {
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loc_info.is_being_used = true;
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loc_info.def = def_inst;
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DEBUG_ASSERT(loc_info.IsUseDef());
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return std::make_tuple(Gen::R(HostLocToX64(current_location)), HostLocToX64(current_location));
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return std::make_tuple(HostLocToX64(current_location), current_location);
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}
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}
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}
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}
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Gen::OpArg use_oparg = UseOpArg(use_value, any_gpr);
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Gen::X64Reg def_reg = DefRegister(def_inst, desired_locations);
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OpArg use_oparg = UseOpArg(use_value, any_gpr);
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HostLoc def_reg = DefHostLocReg(def_inst, desired_locations);
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return std::make_tuple(use_oparg, def_reg);
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}
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Gen::X64Reg RegAlloc::UseRegister(IR::Value use_value, HostLocList desired_locations) {
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HostLoc RegAlloc::UseHostLocReg(IR::Value use_value, HostLocList desired_locations) {
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if (!use_value.IsImmediate()) {
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return UseRegister(use_value.GetInst(), desired_locations);
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return UseHostLocReg(use_value.GetInst(), desired_locations);
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}
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return LoadImmediateIntoRegister(use_value, ScratchRegister(desired_locations));
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return LoadImmediateIntoHostLocReg(use_value, ScratchHostLocReg(desired_locations));
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}
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Gen::X64Reg RegAlloc::UseRegister(IR::Inst* use_inst, HostLocList desired_locations) {
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HostLoc RegAlloc::UseHostLocReg(IR::Inst* use_inst, HostLocList desired_locations) {
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HostLoc current_location;
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bool was_being_used;
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std::tie(current_location, was_being_used) = UseHostLoc(use_inst, desired_locations);
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if (HostLocIsRegister(current_location)) {
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return HostLocToX64(current_location);
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return current_location;
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} else if (HostLocIsSpill(current_location)) {
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HostLoc new_location = SelectARegister(desired_locations);
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if (IsRegisterOccupied(new_location)) {
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@ -192,16 +182,15 @@ Gen::X64Reg RegAlloc::UseRegister(IR::Inst* use_inst, HostLocList desired_locati
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LocInfo(new_location).is_being_used = true;
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DEBUG_ASSERT(LocInfo(new_location).IsScratch());
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}
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return HostLocToX64(new_location);
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return new_location;
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}
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ASSERT_MSG(false, "Unknown current_location type");
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return Gen::INVALID_REG;
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}
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Gen::OpArg RegAlloc::UseOpArg(IR::Value use_value, HostLocList desired_locations) {
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OpArg RegAlloc::UseOpArg(IR::Value use_value, HostLocList desired_locations) {
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if (use_value.IsImmediate()) {
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return ImmediateToOpArg(use_value);
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return Xbyak::Operand(); // return a None
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}
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IR::Inst* use_inst = use_value.GetInst();
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@ -211,24 +200,23 @@ Gen::OpArg RegAlloc::UseOpArg(IR::Value use_value, HostLocList desired_locations
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std::tie(current_location, was_being_used) = UseHostLoc(use_inst, desired_locations);
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if (HostLocIsRegister(current_location)) {
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return Gen::R(HostLocToX64(current_location));
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return HostLocToX64(current_location);
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} else if (HostLocIsSpill(current_location)) {
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return SpillToOpArg(current_location);
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}
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ASSERT_MSG(false, "Unknown current_location type");
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return Gen::R(Gen::INVALID_REG);
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}
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Gen::X64Reg RegAlloc::UseScratchRegister(IR::Value use_value, HostLocList desired_locations) {
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HostLoc RegAlloc::UseScratchHostLocReg(IR::Value use_value, HostLocList desired_locations) {
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if (!use_value.IsImmediate()) {
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return UseScratchRegister(use_value.GetInst(), desired_locations);
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return UseScratchHostLocReg(use_value.GetInst(), desired_locations);
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}
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return LoadImmediateIntoRegister(use_value, ScratchRegister(desired_locations));
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return LoadImmediateIntoHostLocReg(use_value, ScratchHostLocReg(desired_locations));
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}
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Gen::X64Reg RegAlloc::UseScratchRegister(IR::Inst* use_inst, HostLocList desired_locations) {
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HostLoc RegAlloc::UseScratchHostLocReg(IR::Inst* use_inst, HostLocList desired_locations) {
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DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
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DEBUG_ASSERT_MSG(ValueLocation(use_inst), "use_inst has not been defined");
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ASSERT_MSG(use_inst->HasUses(), "use_inst ran out of uses. (Use-d an IR::Inst* too many times)");
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@ -244,7 +232,7 @@ Gen::X64Reg RegAlloc::UseScratchRegister(IR::Inst* use_inst, HostLocList desired
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LocInfo(new_location).is_being_used = true;
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DecrementRemainingUses(use_inst);
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DEBUG_ASSERT(LocInfo(new_location).IsScratch());
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return HostLocToX64(new_location);
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return new_location;
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} else if (HostLocIsRegister(current_location)) {
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ASSERT(LocInfo(current_location).IsIdle()
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|| LocInfo(current_location).IsUse()
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@ -260,14 +248,13 @@ Gen::X64Reg RegAlloc::UseScratchRegister(IR::Inst* use_inst, HostLocList desired
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LocInfo(new_location).values.clear();
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DecrementRemainingUses(use_inst);
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DEBUG_ASSERT(LocInfo(new_location).IsScratch());
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return HostLocToX64(new_location);
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return new_location;
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}
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ASSERT_MSG(0, "Invalid current_location");
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return Gen::INVALID_REG;
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ASSERT_MSG(false, "Invalid current_location");
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}
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Gen::X64Reg RegAlloc::ScratchRegister(HostLocList desired_locations) {
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HostLoc RegAlloc::ScratchHostLocReg(HostLocList desired_locations) {
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DEBUG_ASSERT(std::all_of(desired_locations.begin(), desired_locations.end(), HostLocIsRegister));
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HostLoc location = SelectARegister(desired_locations);
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@ -280,7 +267,7 @@ Gen::X64Reg RegAlloc::ScratchRegister(HostLocList desired_locations) {
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LocInfo(location).is_being_used = true;
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DEBUG_ASSERT(LocInfo(location).IsScratch());
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return HostLocToX64(location);
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return location;
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}
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void RegAlloc::HostCall(IR::Inst* result_def, IR::Value arg0_use, IR::Value arg1_use, IR::Value arg2_use, IR::Value arg3_use) {
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@ -300,26 +287,26 @@ void RegAlloc::HostCall(IR::Inst* result_def, IR::Value arg0_use, IR::Value arg1
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// TODO: This works but almost certainly leads to suboptimal generated code.
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for (HostLoc caller_save : OtherCallerSave) {
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ScratchRegister({caller_save});
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ScratchHostLocReg({caller_save});
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}
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if (result_def) {
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DefRegister(result_def, {AbiReturn});
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DefHostLocReg(result_def, {AbiReturn});
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} else {
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ScratchRegister({AbiReturn});
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ScratchHostLocReg({AbiReturn});
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}
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for (size_t i = 0; i < AbiArgs.size(); i++) {
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if (!args[i]->IsEmpty()) {
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UseScratchRegister(*args[i], {AbiArgs[i]});
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UseScratchHostLocReg(*args[i], {AbiArgs[i]});
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} else {
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ScratchRegister({AbiArgs[i]});
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ScratchHostLocReg({AbiArgs[i]});
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}
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}
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// Flush all xmm registers
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for (auto xmm : any_xmm) {
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ScratchRegister({xmm});
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ScratchHostLocReg({xmm});
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}
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}
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@ -420,17 +407,17 @@ void RegAlloc::Reset() {
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void RegAlloc::EmitMove(HostLoc to, HostLoc from) {
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if (HostLocIsXMM(to) && HostLocIsSpill(from)) {
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code->MOVSD(HostLocToX64(to), SpillToOpArg(from));
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code->movsd(HostLocToXmm(to), SpillToOpArg(from));
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} else if (HostLocIsSpill(to) && HostLocIsXMM(from)) {
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code->MOVSD(SpillToOpArg(to), HostLocToX64(from));
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code->movsd(SpillToOpArg(to), HostLocToXmm(from));
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} else if (HostLocIsXMM(to) && HostLocIsXMM(from)) {
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code->MOVAPS(HostLocToX64(to), Gen::R(HostLocToX64(from)));
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code->movaps(HostLocToXmm(to), HostLocToXmm(from));
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} else if (HostLocIsGPR(to) && HostLocIsSpill(from)) {
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code->MOV(64, Gen::R(HostLocToX64(to)), SpillToOpArg(from));
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code->mov(HostLocToReg64(to), SpillToOpArg(from));
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} else if (HostLocIsSpill(to) && HostLocIsGPR(from)) {
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code->MOV(64, SpillToOpArg(to), Gen::R(HostLocToX64(from)));
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code->mov(SpillToOpArg(to), HostLocToReg64(from));
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} else if (HostLocIsGPR(to) && HostLocIsGPR(from)){
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code->MOV(64, Gen::R(HostLocToX64(to)), Gen::R(HostLocToX64(from)));
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code->mov(HostLocToReg64(to), HostLocToReg64(from));
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} else {
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ASSERT_MSG(false, "Invalid RegAlloc::EmitMove");
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}
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@ -438,7 +425,7 @@ void RegAlloc::EmitMove(HostLoc to, HostLoc from) {
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void RegAlloc::EmitExchange(HostLoc a, HostLoc b) {
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if (HostLocIsGPR(a) && HostLocIsGPR(b)) {
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code->XCHG(64, Gen::R(HostLocToX64(a)), Gen::R(HostLocToX64(b)));
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code->xchg(HostLocToReg64(a), HostLocToReg64(b));
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} else if (HostLocIsXMM(a) && HostLocIsXMM(b)) {
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ASSERT_MSG(false, "Exchange is unnecessary for XMM registers");
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} else {
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@ -495,14 +482,17 @@ std::tuple<HostLoc, bool> RegAlloc::UseHostLoc(IR::Inst* use_inst, HostLocList d
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return std::make_tuple(static_cast<HostLoc>(-1), false);
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}
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Gen::X64Reg RegAlloc::LoadImmediateIntoRegister(IR::Value imm, Gen::X64Reg reg) {
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HostLoc RegAlloc::LoadImmediateIntoHostLocReg(IR::Value imm, HostLoc host_loc) {
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ASSERT_MSG(imm.IsImmediate(), "imm is not an immediate");
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Gen::OpArg op_arg = ImmediateToOpArg(imm);
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if (op_arg.GetImmValue() == 0)
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code->XOR(32, Gen::R(reg), Gen::R(reg));
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Xbyak::Reg64 reg = HostLocToReg64(host_loc);
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u32 imm_value = ImmediateToU32(imm);
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if (imm_value == 0)
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code->xor_(reg, reg);
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else
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code->MOV(32, Gen::R(reg), op_arg);
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return reg;
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code->mov(reg.cvt32(), imm_value);
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return host_loc;
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}
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} // namespace BackendX64
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