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thumb32: Implement REVSH
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parent
95dabcf48e
commit
e2bc7eeb93
4 changed files with 22 additions and 2 deletions
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@ -282,7 +282,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
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//INST(&V::thumb32_REV, "REV", "111110101001----1111----1000----"),
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//INST(&V::thumb32_REV16, "REV16", "111110101001----1111----1001----"),
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//INST(&V::thumb32_RBIT, "RBIT", "111110101001----1111----1010----"),
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//INST(&V::thumb32_REVSH, "REVSH", "111110101001----1111----1011----"),
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INST(&V::thumb32_REVSH, "REVSH", "111110101001nnnn1111dddd1011mmmm"),
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INST(&V::thumb32_SEL, "SEL", "111110101010nnnn1111dddd1000mmmm"),
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INST(&V::thumb32_CLZ, "CLZ", "111110101011nnnn1111dddd1000mmmm"),
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@ -19,6 +19,18 @@ bool ThumbTranslatorVisitor::thumb32_CLZ(Reg n, Reg d, Reg m) {
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_REVSH(Reg n, Reg d, Reg m) {
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if (m != n || d == Reg::PC || m == Reg::PC) {
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return UnpredictableInstruction();
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}
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const auto reg_m = ir.GetRegister(m);
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const auto rev_half = ir.ByteReverseHalf(ir.LeastSignificantHalf(reg_m));
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ir.SetRegister(d, ir.SignExtendHalfToWord(rev_half));
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_SEL(Reg n, Reg d, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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return UnpredictableInstruction();
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@ -118,6 +118,7 @@ struct ThumbTranslatorVisitor final {
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// thumb32 miscellaneous instructions
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bool thumb32_CLZ(Reg n, Reg d, Reg m);
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bool thumb32_REVSH(Reg n, Reg d, Reg m);
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bool thumb32_SEL(Reg n, Reg d, Reg m);
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};
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