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TranslateArm: Implement MRS, MSR (imm), MSR (reg)

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This commit is contained in:
MerryMage 2016-08-14 19:39:16 +01:00
parent 30f3d869cc
commit e164ede4dc
9 changed files with 95 additions and 10 deletions
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8
src/ir_opt/get_set_elimination_pass.cpp
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@ -92,6 +92,14 @@ void GetSetElimination(IR::Block& block) {
do_get(v_info, inst);
break;
}
case IR::Opcode::SetCpsr:
case IR::Opcode::GetCpsr: {
n_info = {};
z_info = {};
c_info = {};
v_info = {};
break;
}
default:
break;
}