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TranslateArm: Implement MRS, MSR (imm), MSR (reg)
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9 changed files with 95 additions and 10 deletions
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@ -749,8 +749,19 @@ public:
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// Status register access instructions
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std::string arm_CPS() { return "ice"; }
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std::string arm_MRS() { return "ice"; }
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std::string arm_MSR() { return "ice"; }
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std::string arm_MRS(Cond cond, Reg d) {
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return Common::StringFromFormat("mrs%s %s, apsr", CondToString(cond), RegToString(d));
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}
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std::string arm_MSR_imm(Cond cond, int mask, int rotate, Imm8 imm8) {
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bool write_nzcvq = Common::Bit<1>(mask);
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bool write_g = Common::Bit<0>(mask);
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return Common::StringFromFormat("msr%s apsr_%s%s, #%u", CondToString(cond), write_nzcvq ? "nzcvq" : "", write_g ? "g" : "", ArmExpandImm(rotate, imm8));
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}
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std::string arm_MSR_reg(Cond cond, int mask, Reg n) {
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bool write_nzcvq = Common::Bit<1>(mask);
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bool write_g = Common::Bit<0>(mask);
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return Common::StringFromFormat("msr%s apsr_%s%s, %s", CondToString(cond), write_nzcvq ? "nzcvq" : "", write_g ? "g" : "", RegToString(n));
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}
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std::string arm_RFE() { return "ice"; }
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std::string arm_SETEND(bool E) {
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return E ? "setend be" : "setend le";
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