Suyu/dynarmic
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/dynarmic.git synced 2026-01-03 13:14:42 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

ir: Add opcodes form unsigned saturated accumulations of signed values

Browse source
This commit is contained in:
Lioncash 2018-09-09 02:01:09 -04:00 • committed by MerryMage
parent 18ad7f237d
commit d4a76aaa04
5 changed files with 91 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

15
src/frontend/ir/ir_emitter.cpp
View file

@ -1642,6 +1642,21 @@ U128 IREmitter::VectorUnsignedRecipSqrtEstimate(const U128& a) {
return Inst<U128>(Opcode::VectorUnsignedRecipSqrtEstimate, a);
}
U128 IREmitter::VectorUnsignedSaturatedAccumulateSigned(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorUnsignedSaturatedAccumulateSigned8, a, b);
case 16:
return Inst<U128>(Opcode::VectorUnsignedSaturatedAccumulateSigned16, a, b);
case 32:
return Inst<U128>(Opcode::VectorUnsignedSaturatedAccumulateSigned32, a, b);
case 64:
return Inst<U128>(Opcode::VectorUnsignedSaturatedAccumulateSigned64, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorUnsignedSaturatedNarrow(size_t esize, const U128& a) {
switch (esize) {
case 16: