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ir: Add opcodes form unsigned saturated accumulations of signed values

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Lioncash 2018-09-09 02:01:09 -04:00 • committed by MerryMage
parent 18ad7f237d
commit d4a76aaa04
5 changed files with 91 additions and 0 deletions
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15
src/frontend/ir/ir_emitter.cpp
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@ -1642,6 +1642,21 @@ U128 IREmitter::VectorUnsignedRecipSqrtEstimate(const U128& a) {
return Inst<U128>(Opcode::VectorUnsignedRecipSqrtEstimate, a);
}
U128 IREmitter::VectorUnsignedSaturatedAccumulateSigned(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorUnsignedSaturatedAccumulateSigned8, a, b);
case 16:
return Inst<U128>(Opcode::VectorUnsignedSaturatedAccumulateSigned16, a, b);
case 32:
return Inst<U128>(Opcode::VectorUnsignedSaturatedAccumulateSigned32, a, b);
case 64:
return Inst<U128>(Opcode::VectorUnsignedSaturatedAccumulateSigned64, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorUnsignedSaturatedNarrow(size_t esize, const U128& a) {
switch (esize) {
case 16:

1
src/frontend/ir/ir_emitter.h
View file

@ -276,6 +276,7 @@ public:
U128 VectorUnsignedAbsoluteDifference(size_t esize, const U128& a, const U128& b);
U128 VectorUnsignedRecipEstimate(const U128& a);
U128 VectorUnsignedRecipSqrtEstimate(const U128& a);
U128 VectorUnsignedSaturatedAccumulateSigned(size_t esize, const U128& a, const U128& b);
U128 VectorUnsignedSaturatedNarrow(size_t esize, const U128& a);
U128 VectorZeroExtend(size_t original_esize, const U128& a);
U128 VectorZeroUpper(const U128& a);

4
src/frontend/ir/microinstruction.cpp
View file

@ -367,6 +367,10 @@ bool Inst::WritesToFPSRCumulativeSaturationBit() const {
case Opcode::VectorSignedSaturatedNeg16:
case Opcode::VectorSignedSaturatedNeg32:
case Opcode::VectorSignedSaturatedNeg64:
case Opcode::VectorUnsignedSaturatedAccumulateSigned8:
case Opcode::VectorUnsignedSaturatedAccumulateSigned16:
case Opcode::VectorUnsignedSaturatedAccumulateSigned32:
case Opcode::VectorUnsignedSaturatedAccumulateSigned64:
case Opcode::VectorUnsignedSaturatedNarrow16:
case Opcode::VectorUnsignedSaturatedNarrow32:
case Opcode::VectorUnsignedSaturatedNarrow64:

4
src/frontend/ir/opcodes.inc
View file

@ -424,6 +424,10 @@ OPCODE(VectorUnsignedAbsoluteDifference16, U128, U128,
OPCODE(VectorUnsignedAbsoluteDifference32, U128, U128, U128 )
OPCODE(VectorUnsignedRecipEstimate, U128, U128 )
OPCODE(VectorUnsignedRecipSqrtEstimate, U128, U128 )
OPCODE(VectorUnsignedSaturatedAccumulateSigned8, U128, U128, U128 )
OPCODE(VectorUnsignedSaturatedAccumulateSigned16, U128, U128, U128 )
OPCODE(VectorUnsignedSaturatedAccumulateSigned32, U128, U128, U128 )
OPCODE(VectorUnsignedSaturatedAccumulateSigned64, U128, U128, U128 )
OPCODE(VectorUnsignedSaturatedNarrow16, U128, U128 )
OPCODE(VectorUnsignedSaturatedNarrow32, U128, U128 )
OPCODE(VectorUnsignedSaturatedNarrow64, U128, U128 )