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Merge pull request #475 from lioncash/muladd

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A64: Enable half-precision variants of floating-point multiply-add instructions
This commit is contained in:
Merry 2019-04-13 14:30:03 +01:00 • committed by MerryMage
commit cb9a1b18b6
13 changed files with 241 additions and 102 deletions
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2
src/frontend/ir/microinstruction.cpp
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@ -269,6 +269,7 @@ bool Inst::ReadsFromAndWritesToFPSRCumulativeExceptionBits() const {
case Opcode::FPMinNumeric64:
case Opcode::FPMul32:
case Opcode::FPMul64:
case Opcode::FPMulAdd16:
case Opcode::FPMulAdd32:
case Opcode::FPMulAdd64:
case Opcode::FPRecipEstimate32:
@ -326,6 +327,7 @@ bool Inst::ReadsFromAndWritesToFPSRCumulativeExceptionBits() const {
case Opcode::FPVectorGreaterEqual64:
case Opcode::FPVectorMul32:
case Opcode::FPVectorMul64:
case Opcode::FPVectorMulAdd16:
case Opcode::FPVectorMulAdd32:
case Opcode::FPVectorMulAdd64:
case Opcode::FPVectorPairedAddLower32: