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IR: Initial implementation of FP{Double,Single}ToFixed{S,U}{32,64}

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This implementation just falls-back to the software floating point implementation.
This commit is contained in:
MerryMage 2018-06-30 10:49:47 +01:00
parent 760cc3ca89
commit caaf36dfd6
12 changed files with 159 additions and 173 deletions
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44
src/frontend/ir/ir_emitter.cpp
View file

@ -1451,24 +1451,44 @@ U64 IREmitter::FPSingleToDouble(const U32& a, bool fpscr_controlled) {
return Inst<U64>(Opcode::FPSingleToDouble, a);
}
U32 IREmitter::FPSingleToS32(const U32& a, bool round_towards_zero, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPSingleToS32, a, Imm1(round_towards_zero));
U32 IREmitter::FPDoubleToFixedS32(const U64& a, size_t fbits, FP::RoundingMode rounding) {
ASSERT(fbits <= 32);
return Inst<U32>(Opcode::FPDoubleToFixedS32, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
}
U32 IREmitter::FPSingleToU32(const U32& a, bool round_towards_zero, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPSingleToU32, a, Imm1(round_towards_zero));
U64 IREmitter::FPDoubleToFixedS64(const U64& a, size_t fbits, FP::RoundingMode rounding) {
ASSERT(fbits <= 64);
return Inst<U64>(Opcode::FPDoubleToFixedS64, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
}
U32 IREmitter::FPDoubleToS32(const U64& a, bool round_towards_zero, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPDoubleToS32, a, Imm1(round_towards_zero));
U32 IREmitter::FPDoubleToFixedU32(const U64& a, size_t fbits, FP::RoundingMode rounding) {
ASSERT(fbits <= 32);
return Inst<U32>(Opcode::FPDoubleToFixedU32, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
}
U32 IREmitter::FPDoubleToU32(const U64& a, bool round_towards_zero, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPDoubleToU32, a, Imm1(round_towards_zero));
U64 IREmitter::FPDoubleToFixedU64(const U64& a, size_t fbits, FP::RoundingMode rounding) {
ASSERT(fbits <= 64);
return Inst<U64>(Opcode::FPDoubleToFixedU64, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
}
U32 IREmitter::FPSingleToFixedS32(const U32& a, size_t fbits, FP::RoundingMode rounding) {
ASSERT(fbits <= 32);
return Inst<U32>(Opcode::FPSingleToFixedS32, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
}
U64 IREmitter::FPSingleToFixedS64(const U32& a, size_t fbits, FP::RoundingMode rounding) {
ASSERT(fbits <= 64);
return Inst<U64>(Opcode::FPSingleToFixedS64, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
}
U32 IREmitter::FPSingleToFixedU32(const U32& a, size_t fbits, FP::RoundingMode rounding) {
ASSERT(fbits <= 32);
return Inst<U32>(Opcode::FPSingleToFixedU32, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
}
U64 IREmitter::FPSingleToFixedU64(const U32& a, size_t fbits, FP::RoundingMode rounding) {
ASSERT(fbits <= 64);
return Inst<U64>(Opcode::FPSingleToFixedU64, a, Imm8(static_cast<u8>(fbits)), Imm8(static_cast<u8>(rounding)));
}
U32 IREmitter::FPS32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled) {

16
src/frontend/ir/ir_emitter.h
View file

@ -12,6 +12,10 @@
#include "frontend/ir/terminal.h"
#include "frontend/ir/value.h"
namespace Dynarmic::FP {
enum class RoundingMode;
} // namespace Dynarmic::FP
// ARM JIT Microinstruction Intermediate Representation
//
// This intermediate representation is an SSA IR. It is designed primarily for analysis,
@ -264,10 +268,14 @@ public:
U32U64 FPSub(const U32U64& a, const U32U64& b, bool fpscr_controlled);
U32 FPDoubleToSingle(const U64& a, bool fpscr_controlled);
U64 FPSingleToDouble(const U32& a, bool fpscr_controlled);
U32 FPSingleToS32(const U32& a, bool round_towards_zero, bool fpscr_controlled);
U32 FPSingleToU32(const U32& a, bool round_towards_zero, bool fpscr_controlled);
U32 FPDoubleToS32(const U64& a, bool round_towards_zero, bool fpscr_controlled);
U32 FPDoubleToU32(const U64& a, bool round_towards_zero, bool fpscr_controlled);
U32 FPDoubleToFixedS32(const U64& a, size_t fbits, FP::RoundingMode rounding);
U64 FPDoubleToFixedS64(const U64& a, size_t fbits, FP::RoundingMode rounding);
U32 FPDoubleToFixedU32(const U64& a, size_t fbits, FP::RoundingMode rounding);
U64 FPDoubleToFixedU64(const U64& a, size_t fbits, FP::RoundingMode rounding);
U32 FPSingleToFixedS32(const U32& a, size_t fbits, FP::RoundingMode rounding);
U64 FPSingleToFixedS64(const U32& a, size_t fbits, FP::RoundingMode rounding);
U32 FPSingleToFixedU32(const U32& a, size_t fbits, FP::RoundingMode rounding);
U64 FPSingleToFixedU64(const U32& a, size_t fbits, FP::RoundingMode rounding);
U32 FPS32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled);
U32 FPU32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled);
U64 FPS32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled);

12
src/frontend/ir/opcodes.inc
View file

@ -386,10 +386,14 @@ OPCODE(FPSub64, T::U64, T::U64, T::U
// Floating-point conversions
OPCODE(FPSingleToDouble, T::U64, T::U32 )
OPCODE(FPDoubleToSingle, T::U32, T::U64 )
OPCODE(FPSingleToU32, T::U32, T::U32, T::U1 )
OPCODE(FPSingleToS32, T::U32, T::U32, T::U1 )
OPCODE(FPDoubleToU32, T::U32, T::U64, T::U1 )
OPCODE(FPDoubleToS32, T::U32, T::U64, T::U1 )
OPCODE(FPDoubleToFixedS32, T::U32, T::U64, T::U8, T::U8 )
OPCODE(FPDoubleToFixedS64, T::U64, T::U64, T::U8, T::U8 )
OPCODE(FPDoubleToFixedU32, T::U32, T::U64, T::U8, T::U8 )
OPCODE(FPDoubleToFixedU64, T::U64, T::U64, T::U8, T::U8 )
OPCODE(FPSingleToFixedS32, T::U32, T::U32, T::U8, T::U8 )
OPCODE(FPSingleToFixedS64, T::U64, T::U32, T::U8, T::U8 )
OPCODE(FPSingleToFixedU32, T::U32, T::U32, T::U8, T::U8 )
OPCODE(FPSingleToFixedU64, T::U64, T::U32, T::U8, T::U8 )
OPCODE(FPU32ToSingle, T::U32, T::U32, T::U1 )
OPCODE(FPS32ToSingle, T::U32, T::U32, T::U1 )
OPCODE(FPU32ToDouble, T::U64, T::U32, T::U1 )