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A32: Implement ASIMD VMAX, VMIN (floating-point)
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8d067d5d60
commit
bb4f3aa407
7 changed files with 100 additions and 52 deletions
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@ -333,4 +333,46 @@ bool ArmTranslatorVisitor::asimd_VMUL(bool P, bool D, size_t sz, size_t Vn, size
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return true;
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}
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bool ArmTranslatorVisitor::asimd_VMAX_float(bool D, bool sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) {
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if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) {
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return UndefinedInstruction();
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}
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if (sz == 0b1) {
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return UndefinedInstruction();
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}
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const auto d = ToVector(Q, Vd, D);
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const auto m = ToVector(Q, Vm, M);
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const auto n = ToVector(Q, Vn, N);
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const auto reg_n = ir.GetVector(n);
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const auto reg_m = ir.GetVector(m);
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const auto result = ir.FPVectorMax(32, reg_m, reg_n, false);
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ir.SetVector(d, result);
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return true;
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}
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bool ArmTranslatorVisitor::asimd_VMIN_float(bool D, bool sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) {
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if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) {
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return UndefinedInstruction();
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}
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if (sz == 0b1) {
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return UndefinedInstruction();
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}
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const auto d = ToVector(Q, Vd, D);
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const auto m = ToVector(Q, Vm, M);
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const auto n = ToVector(Q, Vn, N);
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const auto reg_n = ir.GetVector(n);
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const auto reg_m = ir.GetVector(m);
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const auto result = ir.FPVectorMin(32, reg_m, reg_n, false);
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ir.SetVector(d, result);
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return true;
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}
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} // namespace Dynarmic::A32
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