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A64: Implement AESIMC and AESMC
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744495e23d
commit
a5c4fbc783
9 changed files with 189 additions and 2 deletions
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@ -715,6 +715,14 @@ U32 IREmitter::CRC32ISO64(const U32& a, const U64& b) {
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return Inst<U32>(Opcode::CRC32ISO64, a, b);
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}
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U128 IREmitter::AESInverseMixColumns(const U128 &a) {
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return Inst<U128>(Opcode::AESInverseMixColumns, a);
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}
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U128 IREmitter::AESMixColumns(const U128 &a) {
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return Inst<U128>(Opcode::AESMixColumns, a);
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}
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UAny IREmitter::VectorGetElement(size_t esize, const U128& a, size_t index) {
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ASSERT_MSG(esize * index < 128, "Invalid index");
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switch (esize) {
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@ -195,6 +195,9 @@ public:
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U32 CRC32ISO32(const U32& a, const U32& b);
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U32 CRC32ISO64(const U32& a, const U64& b);
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U128 AESInverseMixColumns(const U128& a);
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U128 AESMixColumns(const U128& a);
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UAny VectorGetElement(size_t esize, const U128& a, size_t index);
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U128 VectorAdd8(const U128& a, const U128& b);
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U128 VectorAdd16(const U128& a, const U128& b);
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@ -178,6 +178,10 @@ OPCODE(CRC32ISO16, T::U32, T::U32, T::U32
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OPCODE(CRC32ISO32, T::U32, T::U32, T::U32 )
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OPCODE(CRC32ISO64, T::U32, T::U32, T::U64 )
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// AES instructions
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OPCODE(AESInverseMixColumns, T::U128, T::U128 )
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OPCODE(AESMixColumns, T::U128, T::U128 )
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// Vector instructions
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OPCODE(VectorGetElement8, T::U8, T::U128, T::U8 )
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OPCODE(VectorGetElement16, T::U16, T::U128, T::U8 )
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