A64: Implement FMUL (scalar), FDIV (scalar), FADD (scalar), FSUB (scalar), FNMUL (scalar)

This commit is contained in:
MerryMage 2018-02-02 22:04:09 +00:00
parent 429dc24587
commit 99d8ebe4d5
5 changed files with 120 additions and 5 deletions

View file

@ -151,6 +151,16 @@ void TranslatorVisitor::V(size_t bitsize, Vec vec, IR::U128 value) {
}
}
IR::UAny TranslatorVisitor::V_scalar(size_t bitsize, Vec vec) {
// TODO: Optimize
return ir.VectorGetElement(bitsize, ir.GetQ(vec), 0);
}
void TranslatorVisitor::V_scalar(size_t /*bitsize*/, Vec vec, IR::UAny value) {
// TODO: Optimize
ir.SetQ(vec, ir.ZeroExtendToQuad(value));
}
IR::UAnyU128 TranslatorVisitor::Mem(IR::U64 address, size_t bytesize, AccType /*acctype*/) {
switch (bytesize) {
case 1: