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A64: Implement scalar double/single-precision variants of FACGE, FACGT, FCMEQ, FCMGE, FCMGT

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Lioncash 2018-07-13 18:37:10 -04:00 • committed by MerryMage
parent 0b97e9bd8d
commit 9912836b59
2 changed files with 65 additions and 5 deletions
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10
src/frontend/A64/decoder/a64.inc
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@ -341,21 +341,21 @@ INST(DUP_elt_1, "DUP (element)", "01011
//INST(FMULX_vec_1, "FMULX", "01011110010mmmmm000111nnnnnddddd")
//INST(FMULX_vec_2, "FMULX", "010111100z1mmmmm110111nnnnnddddd")
//INST(FCMEQ_reg_1, "FCMEQ (register)", "01011110010mmmmm001001nnnnnddddd")
//INST(FCMEQ_reg_2, "FCMEQ (register)", "010111100z1mmmmm111001nnnnnddddd")
INST(FCMEQ_reg_2, "FCMEQ (register)", "010111100z1mmmmm111001nnnnnddddd")
//INST(FRECPS_1, "FRECPS", "01011110010mmmmm001111nnnnnddddd")
//INST(FRECPS_2, "FRECPS", "010111100z1mmmmm111111nnnnnddddd")
//INST(FRSQRTS_1, "FRSQRTS", "01011110110mmmmm001111nnnnnddddd")
//INST(FRSQRTS_2, "FRSQRTS", "010111101z1mmmmm111111nnnnnddddd")
//INST(FCMGE_reg_1, "FCMGE (register)", "01111110010mmmmm001001nnnnnddddd")
//INST(FCMGE_reg_2, "FCMGE (register)", "011111100z1mmmmm111001nnnnnddddd")
INST(FCMGE_reg_2, "FCMGE (register)", "011111100z1mmmmm111001nnnnnddddd")
//INST(FACGE_1, "FACGE", "01111110010mmmmm001011nnnnnddddd")
//INST(FACGE_2, "FACGE", "011111100z1mmmmm111011nnnnnddddd")
INST(FACGE_2, "FACGE", "011111100z1mmmmm111011nnnnnddddd")
//INST(FABD_1, "FABD", "01111110110mmmmm000101nnnnnddddd")
INST(FABD_2, "FABD", "011111101z1mmmmm110101nnnnnddddd")
//INST(FCMGT_reg_1, "FCMGT (register)", "01111110110mmmmm001001nnnnnddddd")
//INST(FCMGT_reg_2, "FCMGT (register)", "011111101z1mmmmm111001nnnnnddddd")
INST(FCMGT_reg_2, "FCMGT (register)", "011111101z1mmmmm111001nnnnnddddd")
//INST(FACGT_1, "FACGT", "01111110110mmmmm001011nnnnnddddd")
//INST(FACGT_2, "FACGT", "011111101z1mmmmm111011nnnnnddddd")
INST(FACGT_2, "FACGT", "011111101z1mmmmm111011nnnnnddddd")
// Data Processing - FP and SIMD - Scalar two register misc
//INST(FCVTNS_1, "FCVTNS (vector)", "0101111001111001101010nnnnnddddd")