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VFP: Implement VSUB
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8 changed files with 81 additions and 1 deletions
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@ -36,6 +36,25 @@ bool ArmTranslatorVisitor::vfp2_VADD(Cond cond, bool D, size_t Vn, size_t Vd, bo
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return true;
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}
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bool ArmTranslatorVisitor::vfp2_VSUB(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
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if (ir.current_location.FPSCR_Len() != 1 || ir.current_location.FPSCR_Stride() != 1)
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return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
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ExtReg d = ToExtReg(sz, Vd, D);
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ExtReg n = ToExtReg(sz, Vn, N);
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ExtReg m = ToExtReg(sz, Vm, M);
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// VSUB.{F32,F64} <{S,D}d>, <{S,D}n>, <{S,D}m>
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if (ConditionPassed(cond)) {
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auto a = ir.GetExtendedRegister(n);
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auto b = ir.GetExtendedRegister(m);
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auto result = sz
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? ir.FPSub64(a, b, true)
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: ir.FPSub32(a, b, true);
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ir.SetExtendedRegister(d, result);
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}
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return true;
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}
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bool ArmTranslatorVisitor::vfp2_VABS(Cond cond, bool D, size_t Vd, bool sz, bool M, size_t Vm) {
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if (ir.current_location.FPSCR_Len() != 1 || ir.current_location.FPSCR_Stride() != 1)
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return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
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