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Implement SADD8, SADD16, SSUB8, SSUB16, USUB16

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FernandoS27 2016-12-18 11:25:41 -05:00 • committed by Merry
parent 3f6ecfe245
commit 8919265d2c
6 changed files with 398 additions and 42 deletions
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40
tests/arm/fuzz_arm.cpp
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@ -895,27 +895,33 @@ TEST_CASE("Fuzz ARM multiply instructions", "[JitX64]") {
}
}
TEST_CASE("Fuzz ARM parallel instructions", "[JitX64]") {
TEST_CASE("Fuzz ARM parallel instructions", "[JitX64][parallel]") {
const auto is_valid = [](u32 instr) -> bool {
// R15 as Rd, Rn, or Rm is UNPREDICTABLE
return Bits<0, 3>(instr) != 0b1111 && Bits<12, 15>(instr) != 0b1111 && Bits<16, 19>(instr) != 0b1111;
};
const std::array<InstructionGenerator, 12> modulo_instructions = {{
const std::array<InstructionGenerator, 4> modulo_add_instructions = {{
InstructionGenerator("cccc01100001nnnndddd11111001mmmm", is_valid), // SADD8
InstructionGenerator("cccc01100001nnnndddd11110001mmmm", is_valid), // SADD16
InstructionGenerator("cccc01100001nnnndddd11110011mmmm", is_valid), // SASX
InstructionGenerator("cccc01100001nnnndddd11110101mmmm", is_valid), // SSAX
InstructionGenerator("cccc01100001nnnndddd11111111mmmm", is_valid), // SSUB8
InstructionGenerator("cccc01100001nnnndddd11110111mmmm", is_valid), // SSUB16
InstructionGenerator("cccc01100101nnnndddd11111001mmmm", is_valid), // UADD8
InstructionGenerator("cccc01100101nnnndddd11110001mmmm", is_valid), // UADD16
InstructionGenerator("cccc01100101nnnndddd11110011mmmm", is_valid), // UASX
InstructionGenerator("cccc01100101nnnndddd11110101mmmm", is_valid), // USAX
}};
const std::array<InstructionGenerator, 4> modulo_sub_instructions = {{
InstructionGenerator("cccc01100001nnnndddd11111111mmmm", is_valid), // SSUB8
InstructionGenerator("cccc01100001nnnndddd11110111mmmm", is_valid), // SSUB16
InstructionGenerator("cccc01100101nnnndddd11111111mmmm", is_valid), // USUB8
InstructionGenerator("cccc01100101nnnndddd11110111mmmm", is_valid), // USUB16
}};
const std::array<InstructionGenerator, 4> modulo_exchange_instructions = {{
InstructionGenerator("cccc01100001nnnndddd11110011mmmm", is_valid), // SASX
InstructionGenerator("cccc01100001nnnndddd11110101mmmm", is_valid), // SSAX
InstructionGenerator("cccc01100101nnnndddd11110011mmmm", is_valid), // UASX
InstructionGenerator("cccc01100101nnnndddd11110101mmmm", is_valid), // USAX
}};
const std::array<InstructionGenerator, 8> saturating_instructions = {{
InstructionGenerator("cccc01100010nnnndddd11111001mmmm", is_valid), // QADD8
InstructionGenerator("cccc01100010nnnndddd11111111mmmm", is_valid), // QSUB8
@ -942,9 +948,21 @@ TEST_CASE("Fuzz ARM parallel instructions", "[JitX64]") {
InstructionGenerator("cccc01100111nnnndddd11110111mmmm", is_valid), // UHSUB16
}};
SECTION("Parallel Add/Subtract (Modulo)") {
FuzzJitArm(1, 1, 10000, [&modulo_instructions]() -> u32 {
return modulo_instructions[RandInt<size_t>(0, modulo_instructions.size() - 1)].Generate();
SECTION("Parallel Add (Modulo)") {
FuzzJitArm(1, 1, 10000, [&modulo_add_instructions]() -> u32 {
return modulo_add_instructions[RandInt<size_t>(0, modulo_add_instructions.size() - 1)].Generate();
});
}
SECTION("Parallel Subtract (Modulo)") {
FuzzJitArm(1, 1, 10000, [&modulo_sub_instructions]() -> u32 {
return modulo_sub_instructions[RandInt<size_t>(0, modulo_sub_instructions.size() - 1)].Generate();
});
}
SECTION("Parallel Exchange (Modulo)") {
FuzzJitArm(1, 1, 10000, [&modulo_exchange_instructions]() -> u32 {
return modulo_exchange_instructions[RandInt<size_t>(0, modulo_exchange_instructions.size() - 1)].Generate();
});
}