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A64: Implement half-precision vector variant of FRECPS

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Lioncash 2019-04-13 19:05:23 -04:00 • committed by MerryMage
parent de43f011a7
commit 86b7626a2f
2 changed files with 13 additions and 1 deletions
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12
src/frontend/A64/translate/impl/simd_three_same.cpp
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@ -939,6 +939,18 @@ bool TranslatorVisitor::FSUB_2(bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd) {
return true;
}
bool TranslatorVisitor::FRECPS_3(bool Q, Vec Vm, Vec Vn, Vec Vd) {
const size_t esize = 16;
const size_t datasize = Q ? 128 : 64;
const IR::U128 operand1 = V(datasize, Vn);
const IR::U128 operand2 = V(datasize, Vm);
const IR::U128 result = ir.FPVectorRecipStepFused(esize, operand1, operand2);
V(datasize, Vd, result);
return true;
}
bool TranslatorVisitor::FRECPS_4(bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd) {
if (sz && !Q) {
return ReservedValue();