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frontend/ir_emitter: Add half-precision variant of FPAbs

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Lioncash 2019-03-23 13:38:05 -04:00 • committed by MerryMage
parent 10abc77fad
commit 8309ec7a9f
4 changed files with 23 additions and 6 deletions
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12
src/frontend/ir/ir_emitter.cpp
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@ -1773,11 +1773,17 @@ U128 IREmitter::ZeroVector() {
return Inst<U128>(Opcode::ZeroVector);
}
U32U64 IREmitter::FPAbs(const U32U64& a) {
if (a.GetType() == Type::U32) {
U16U32U64 IREmitter::FPAbs(const U16U32U64& a) {
switch (a.GetType()) {
case Type::U16:
return Inst<U16>(Opcode::FPAbs16, a);
case Type::U32:
return Inst<U32>(Opcode::FPAbs32, a);
} else {
case Type::U64:
return Inst<U64>(Opcode::FPAbs64, a);
default:
UNREACHABLE();
return U16U32U64{};
}
}

2
src/frontend/ir/ir_emitter.h
View file

@ -292,7 +292,7 @@ public:
U128 VectorZeroUpper(const U128& a);
U128 ZeroVector();
U32U64 FPAbs(const U32U64& a);
U16U32U64 FPAbs(const U16U32U64& a);
U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpcr_controlled);
NZCV FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpcr_controlled);
U32U64 FPDiv(const U32U64& a, const U32U64& b, bool fpcr_controlled);

1
src/frontend/ir/opcodes.inc
View file

@ -460,6 +460,7 @@ OPCODE(VectorZeroUpper, U128, U128
OPCODE(ZeroVector, U128, )
// Floating-point operations
OPCODE(FPAbs16, U16, U16 )
OPCODE(FPAbs32, U32, U32 )
OPCODE(FPAbs64, U64, U64 )
OPCODE(FPAdd32, U32, U32, U32 )