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ir: Add opcodes for converting S64 and U64 to single-precision floating-point values

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Lioncash 2018-07-09 19:32:30 -04:00 • committed by MerryMage
parent 066061fa50
commit 7a84b6e8d8
4 changed files with 65 additions and 0 deletions
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10
src/frontend/ir/ir_emitter.cpp
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@ -1481,6 +1481,11 @@ U64 IREmitter::FPS64ToDouble(const U64& a, bool round_to_nearest, bool fpscr_con
return Inst<U64>(Opcode::FPS64ToDouble, a, Imm1(round_to_nearest));
}
U32 IREmitter::FPS64ToSingle(const U64& a, bool round_to_nearest, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPS64ToSingle, a, Imm1(round_to_nearest));
}
U32 IREmitter::FPU32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPU32ToSingle, a, Imm1(round_to_nearest));
@ -1501,6 +1506,11 @@ U64 IREmitter::FPU64ToDouble(const U64& a, bool round_to_nearest, bool fpscr_con
return Inst<U64>(Opcode::FPU64ToDouble, a, Imm1(round_to_nearest));
}
U32 IREmitter::FPU64ToSingle(const U64& a, bool round_to_nearest, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPU64ToSingle, a, Imm1(round_to_nearest));
}
U128 IREmitter::FPVectorAbs(size_t esize, const U128& a) {
switch (esize) {
case 16:

2
src/frontend/ir/ir_emitter.h
View file

@ -272,8 +272,10 @@ public:
U32 FPU32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled);
U64 FPS32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled);
U64 FPS64ToDouble(const U64& a, bool round_to_nearest, bool fpscr_controlled);
U32 FPS64ToSingle(const U64& a, bool round_to_nearest, bool fpscr_controlled);
U64 FPU32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled);
U64 FPU64ToDouble(const U64& a, bool round_to_nearest, bool fpscr_controlled);
U32 FPU64ToSingle(const U64& a, bool round_to_nearest, bool fpscr_controlled);
U128 FPVectorAbs(size_t esize, const U128& a);
U128 FPVectorAbsoluteDifference(size_t esize, const U128& a, const U128& b);

2
src/frontend/ir/opcodes.inc
View file

@ -394,8 +394,10 @@ OPCODE(FPU32ToSingle, T::U32, T::U32, T::U
OPCODE(FPS32ToSingle, T::U32, T::U32, T::U1 )
OPCODE(FPU32ToDouble, T::U64, T::U32, T::U1 )
OPCODE(FPU64ToDouble, T::U64, T::U64, T::U1 )
OPCODE(FPU64ToSingle, T::U32, T::U64, T::U1 )
OPCODE(FPS32ToDouble, T::U64, T::U32, T::U1 )
OPCODE(FPS64ToDouble, T::U64, T::U64, T::U1 )
OPCODE(FPS64ToSingle, T::U32, T::U64, T::U1 )
// Floating-point vector instructions
OPCODE(FPVectorAbs16, T::U128, T::U128 )