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A32: Implement ASIMD VSWP
A trivial one to implement, this just swaps the contents of two registers in place.
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4 changed files with 48 additions and 1 deletions
43
src/frontend/A32/translate/impl/asimd_two_regs_misc.cpp
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43
src/frontend/A32/translate/impl/asimd_two_regs_misc.cpp
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/* This file is part of the dynarmic project.
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* Copyright (c) 2020 MerryMage
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* SPDX-License-Identifier: 0BSD
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*/
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#include "common/bit_util.h"
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#include "frontend/A32/translate/impl/translate_arm.h"
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namespace Dynarmic::A32 {
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namespace {
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ExtReg ToExtRegD(size_t base, bool bit) {
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return ExtReg::D0 + (base + (bit ? 16 : 0));
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}
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} // Anonymous namespace
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bool ArmTranslatorVisitor::asimd_VSWP(bool D, size_t Vd, bool Q, bool M, size_t Vm) {
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if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) {
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return UndefinedInstruction();
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}
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// Swapping the same register results in the same contents.
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const auto d = ToExtRegD(Vd, D);
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const auto m = ToExtRegD(Vm, M);
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if (d == m) {
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return true;
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}
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const size_t regs = Q ? 2 : 1;
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for (size_t i = 0; i < regs; i++) {
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const auto d_index = d + i;
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const auto m_index = m + i;
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const auto reg_d = ir.GetExtendedRegister(d_index);
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const auto reg_m = ir.GetExtendedRegister(m_index);
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ir.SetExtendedRegister(m_index, reg_d);
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ir.SetExtendedRegister(d_index, reg_m);
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}
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return true;
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}
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} // namespace Dynarmic::A32
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