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A32: Implement ASIMD VMUL (floating-point)

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* Also add fpcr_controlled arguments to FPVectorMul IR instruction
* Merge ASIMD floating-point instruction implementations
This commit is contained in:
MerryMage 2020-06-20 13:33:45 +01:00
parent bb4f3aa407
commit 5ec8e48593
7 changed files with 90 additions and 86 deletions
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4
src/frontend/ir/opcodes.inc
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@ -599,8 +599,8 @@ OPCODE(FPVectorMax32, U128, U128
OPCODE(FPVectorMax64, U128, U128, U128, U1 )
OPCODE(FPVectorMin32, U128, U128, U128, U1 )
OPCODE(FPVectorMin64, U128, U128, U128, U1 )
OPCODE(FPVectorMul32, U128, U128, U128 )
OPCODE(FPVectorMul64, U128, U128, U128 )
OPCODE(FPVectorMul32, U128, U128, U128, U1 )
OPCODE(FPVectorMul64, U128, U128, U128, U1 )
OPCODE(FPVectorMulAdd16, U128, U128, U128, U128 )
OPCODE(FPVectorMulAdd32, U128, U128, U128, U128 )
OPCODE(FPVectorMulAdd64, U128, U128, U128, U128 )