Suyu/dynarmic
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/dynarmic.git synced 2026-01-07 06:58:15 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

frontend/ir_emitter: Add half-precision variant of FPVectorRoundInt

Browse source
This commit is contained in:
Lioncash 2019-04-13 17:49:04 -04:00 • committed by MerryMage
parent ad0c698f89
commit 5b4673da4b
3 changed files with 34 additions and 22 deletions
Download patch file Download diff file Expand all files Collapse all files

9
src/frontend/ir/ir_emitter.cpp
View file

@ -2278,11 +2278,16 @@ U128 IREmitter::FPVectorRecipStepFused(size_t esize, const U128& a, const U128&
}
U128 IREmitter::FPVectorRoundInt(size_t esize, const U128& operand, FP::RoundingMode rounding, bool exact) {
const IR::U8 rounding_imm = Imm8(static_cast<u8>(rounding));
const IR::U1 exact_imm = Imm1(exact);
switch (esize) {
case 16:
return Inst<U128>(Opcode::FPVectorRoundInt16, operand, rounding_imm, exact_imm);
case 32:
return Inst<U128>(Opcode::FPVectorRoundInt32, operand, Imm8(static_cast<u8>(rounding)), Imm1(exact));
return Inst<U128>(Opcode::FPVectorRoundInt32, operand, rounding_imm, exact_imm);
case 64:
return Inst<U128>(Opcode::FPVectorRoundInt64, operand, Imm8(static_cast<u8>(rounding)), Imm1(exact));
return Inst<U128>(Opcode::FPVectorRoundInt64, operand, rounding_imm, exact_imm);
}
UNREACHABLE();
return {};

1
src/frontend/ir/opcodes.inc
View file

@ -574,6 +574,7 @@ OPCODE(FPVectorRecipEstimate32, U128, U128
OPCODE(FPVectorRecipEstimate64, U128, U128 )
OPCODE(FPVectorRecipStepFused32, U128, U128, U128 )
OPCODE(FPVectorRecipStepFused64, U128, U128, U128 )
OPCODE(FPVectorRoundInt16, U128, U128, U8, U1 )
OPCODE(FPVectorRoundInt32, U128, U128, U8, U1 )
OPCODE(FPVectorRoundInt64, U128, U128, U8, U1 )
OPCODE(FPVectorRSqrtEstimate32, U128, U128 )