Suyu/dynarmic
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/dynarmic.git synced 2026-01-06 06:28:13 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

ir_emitter: Remove overloads

Browse source 
Having overloads made explicit casting necesssary for these functions when
using types like UAny.
This commit is contained in:
MerryMage 2018-04-03 22:26:29 +01:00
parent 83ff7a43d1
commit 575590d18d
6 changed files with 95 additions and 184 deletions
Download patch file Download diff file Expand all files Collapse all files

72
src/frontend/ir/ir_emitter.cpp
View file

@ -217,14 +217,6 @@ U32U64 IREmitter::AddWithCarry(const U32U64& a, const U32U64& b, const U1& carry
}
}
U32 IREmitter::Add(const U32& a, const U32& b) {
return Inst<U32>(Opcode::Add32, a, b, Imm1(0));
}
U64 IREmitter::Add(const U64& a, const U64& b) {
return Inst<U64>(Opcode::Add64, a, b, Imm1(0));
}
U32U64 IREmitter::Add(const U32U64& a, const U32U64& b) {
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
@ -251,14 +243,6 @@ U32U64 IREmitter::SubWithCarry(const U32U64& a, const U32U64& b, const U1& carry
}
}
U32 IREmitter::Sub(const U32& a, const U32& b) {
return Inst<U32>(Opcode::Sub32, a, b, Imm1(1));
}
U64 IREmitter::Sub(const U64& a, const U64& b) {
return Inst<U64>(Opcode::Sub64, a, b, Imm1(1));
}
U32U64 IREmitter::Sub(const U32U64& a, const U32U64& b) {
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
@ -268,14 +252,6 @@ U32U64 IREmitter::Sub(const U32U64& a, const U32U64& b) {
}
}
U32 IREmitter::Mul(const U32& a, const U32& b) {
return Inst<U32>(Opcode::Mul32, a, b);
}
U64 IREmitter::Mul(const U64& a, const U64& b) {
return Inst<U64>(Opcode::Mul64, a, b);
}
U32U64 IREmitter::Mul(const U32U64& a, const U32U64& b) {
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::Mul32, a, b);
@ -292,14 +268,6 @@ U64 IREmitter::SignedMultiplyHigh(const U64& a, const U64& b) {
return Inst<U64>(Opcode::SignedMultiplyHigh64, a, b);
}
U32 IREmitter::UnsignedDiv(const U32& a, const U32& b) {
return Inst<U32>(Opcode::UnsignedDiv32, a, b);
}
U64 IREmitter::UnsignedDiv(const U64& a, const U64& b) {
return Inst<U64>(Opcode::UnsignedDiv64, a, b);
}
U32U64 IREmitter::UnsignedDiv(const U32U64& a, const U32U64& b) {
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::UnsignedDiv32, a, b);
@ -308,14 +276,6 @@ U32U64 IREmitter::UnsignedDiv(const U32U64& a, const U32U64& b) {
return Inst<U64>(Opcode::UnsignedDiv64, a, b);
}
U32 IREmitter::SignedDiv(const U32& a, const U32& b) {
return Inst<U32>(Opcode::SignedDiv32, a, b);
}
U64 IREmitter::SignedDiv(const U64& a, const U64& b) {
return Inst<U64>(Opcode::SignedDiv64, a, b);
}
U32U64 IREmitter::SignedDiv(const U32U64& a, const U32U64& b) {
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::SignedDiv32, a, b);
@ -324,10 +284,6 @@ U32U64 IREmitter::SignedDiv(const U32U64& a, const U32U64& b) {
return Inst<U64>(Opcode::SignedDiv64, a, b);
}
U32 IREmitter::And(const U32& a, const U32& b) {
return Inst<U32>(Opcode::And32, a, b);
}
U32U64 IREmitter::And(const U32U64& a, const U32U64& b) {
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
@ -337,10 +293,6 @@ U32U64 IREmitter::And(const U32U64& a, const U32U64& b) {
}
}
U32 IREmitter::Eor(const U32& a, const U32& b) {
return Inst<U32>(Opcode::Eor32, a, b);
}
U32U64 IREmitter::Eor(const U32U64& a, const U32U64& b) {
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
@ -350,10 +302,6 @@ U32U64 IREmitter::Eor(const U32U64& a, const U32U64& b) {
}
}
U32 IREmitter::Or(const U32& a, const U32& b) {
return Inst<U32>(Opcode::Or32, a, b);
}
U32U64 IREmitter::Or(const U32U64& a, const U32U64& b) {
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
@ -363,10 +311,6 @@ U32U64 IREmitter::Or(const U32U64& a, const U32U64& b) {
}
}
U32 IREmitter::Not(const U32& a) {
return Inst<U32>(Opcode::Not32, a);
}
U32U64 IREmitter::Not(const U32U64& a) {
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::Not32, a);
@ -489,14 +433,6 @@ U64 IREmitter::ByteReverseDual(const U64& a) {
return Inst<U64>(Opcode::ByteReverseDual, a);
}
U32 IREmitter::CountLeadingZeros(const U32& a) {
return Inst<U32>(Opcode::CountLeadingZeros32, a);
}
U64 IREmitter::CountLeadingZeros(const U64& a) {
return Inst<U64>(Opcode::CountLeadingZeros64, a);
}
U32U64 IREmitter::CountLeadingZeros(const U32U64& a) {
if (a.GetType() == IR::Type::U32) {
return Inst<U32>(Opcode::CountLeadingZeros32, a);
@ -505,14 +441,6 @@ U32U64 IREmitter::CountLeadingZeros(const U32U64& a) {
return Inst<U64>(Opcode::CountLeadingZeros64, a);
}
U32 IREmitter::ExtractRegister(const U32& a, const U32& b, const U8& lsb) {
return Inst<U32>(Opcode::ExtractRegister32, a, b, lsb);
}
U64 IREmitter::ExtractRegister(const U64& a, const U64& b, const U8& lsb) {
return Inst<U64>(Opcode::ExtractRegister64, a, b, lsb);
}
U32U64 IREmitter::ExtractRegister(const U32U64& a, const U32U64& b, const U8& lsb) {
if (a.GetType() == IR::Type::U32) {
return Inst<U32>(Opcode::ExtractRegister32, a, b, lsb);

18
src/frontend/ir/ir_emitter.h
View file

@ -104,30 +104,16 @@ public:
ResultAndCarryAndOverflow<U32> SubWithCarry(const U32& a, const U32& b, const U1& carry_in);
U32U64 AddWithCarry(const U32U64& a, const U32U64& b, const U1& carry_in);
U32U64 SubWithCarry(const U32U64& a, const U32U64& b, const U1& carry_in);
U32 Add(const U32& a, const U32& b);
U64 Add(const U64& a, const U64& b);
U32U64 Add(const U32U64& a, const U32U64& b);
U32 Sub(const U32& a, const U32& b);
U64 Sub(const U64& a, const U64& b);
U32U64 Sub(const U32U64& a, const U32U64& b);
U32 Mul(const U32& a, const U32& b);
U64 Mul(const U64& a, const U64& b);
U32U64 Mul(const U32U64& a, const U32U64& b);
U64 UnsignedMultiplyHigh(const U64& a, const U64& b);
U64 SignedMultiplyHigh(const U64& a, const U64& b);
U32 UnsignedDiv(const U32& a, const U32& b);
U64 UnsignedDiv(const U64& a, const U64& b);
U32U64 UnsignedDiv(const U32U64& a, const U32U64& b);
U32 SignedDiv(const U32& a, const U32& b);
U64 SignedDiv(const U64& a, const U64& b);
U32U64 SignedDiv(const U32U64& a, const U32U64& b);
U32 And(const U32& a, const U32& b);
U32U64 And(const U32U64& a, const U32U64& b);
U32 Eor(const U32& a, const U32& b);
U32U64 Eor(const U32U64& a, const U32U64& b);
U32 Or(const U32& a, const U32& b);
U32U64 Or(const U32U64& a, const U32U64& b);
U32 Not(const U32& a);
U32U64 Not(const U32U64& a);
U32 SignExtendToWord(const UAny& a);
U64 SignExtendToLong(const UAny& a);
@ -145,11 +131,7 @@ public:
U32 ByteReverseWord(const U32& a);
U16 ByteReverseHalf(const U16& a);
U64 ByteReverseDual(const U64& a);
U32 CountLeadingZeros(const U32& a);
U64 CountLeadingZeros(const U64& a);
U32U64 CountLeadingZeros(const U32U64& a);
U32 ExtractRegister(const U32& a, const U32& b, const U8& lsb);
U64 ExtractRegister(const U64& a, const U64& b, const U8& lsb);
U32U64 ExtractRegister(const U32U64& a, const U32U64& b, const U8& lsb);
ResultAndOverflow<U32> SignedSaturatedAdd(const U32& a, const U32& b);