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A32: Implement ASIMD VCVT (between floating-point and fixed-point)

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This commit is contained in:
MerryMage 2020-06-21 20:22:39 +01:00
parent 6f56043a73
commit 562a98bcf9
3 changed files with 25 additions and 1 deletions
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2
src/frontend/A32/decoder/asimd.inc
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@ -94,7 +94,7 @@ INST(asimd_VQRSHRUN, "VQRSHRUN", "111100111Diiiiiidddd100
//INST(asimd_VQSHRN, "VQSHRN", "1111001U1-vvv-------100100-1----") // ASIMD
INST(asimd_VQRSHRN, "VQRSHRN", "1111001U1Diiiiiidddd100101M1mmmm") // ASIMD
//INST(asimd_SHLL, "SHLL", "1111001U1-vvv-------101000-1----") // ASIMD
//INST(asimd_VCVT_fixed, "VCVT (fixed-point)", "1111001U1-vvv-------111x0B-1----") // ASIMD
INST(asimd_VCVT_fixed, "VCVT (fixed-point)", "1111001U1Diiiiiidddd111o0QM1mmmm") // ASIMD
// Two registers, miscellaneous
INST(asimd_VREV, "VREV{16,32,64}", "111100111D11zz00dddd000ooQM0mmmm") // ASIMD