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A32: Implement ASIMD VSUB (integer)
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4d6f68525d
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551e207661
3 changed files with 20 additions and 1 deletions
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@ -212,6 +212,24 @@ bool ArmTranslatorVisitor::asimd_VADD_int(bool D, size_t sz, size_t Vn, size_t V
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return true;
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}
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bool ArmTranslatorVisitor::asimd_VSUB_int(bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) {
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if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) {
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return UndefinedInstruction();
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}
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const size_t esize = 8U << sz;
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const auto d = ToVector(Q, Vd, D);
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const auto m = ToVector(Q, Vm, M);
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const auto n = ToVector(Q, Vn, N);
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const auto reg_m = ir.GetVector(m);
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const auto reg_n = ir.GetVector(n);
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const auto result = ir.VectorSub(esize, reg_n, reg_m);
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ir.SetVector(d, result);
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return true;
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}
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bool ArmTranslatorVisitor::asimd_VTST(bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) {
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if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) {
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return UndefinedInstruction();
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