Suyu/dynarmic
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/dynarmic.git synced 2026-01-05 22:18:16 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

A32: Implement ASIMD VSUB (integer)

Browse source
This commit is contained in:
Lioncash 2020-06-18 22:18:54 -04:00 • committed by merry
parent 4d6f68525d
commit 551e207661
3 changed files with 20 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/frontend/A32/decoder/asimd.inc
View file

@ -22,7 +22,7 @@ INST(asimd_VQSUB, "VQSUB", "1111001U0Dzznnnndddd001
//INST(asimd_VABD, "VABD/VABDL", "1111001U0-CC--------0111---0----") // ASIMD
//INST(asimd_VABA, "VABA/ABAL", "1111001U0-CC--------0111---1----") // ASIMD
INST(asimd_VADD_int, "VADD (integer)", "111100100Dzznnnndddd1000NQM0mmmm") // ASIMD
//INST(asimd_VSUB_int, "VSUB (integer)", "111100110-CC--------1000---0----") // ASIMD
INST(asimd_VSUB_int, "VSUB (integer)", "111100110Dzznnnndddd1000NQM0mmmm") // ASIMD
INST(asimd_VTST, "VTST", "111100100Dzznnnndddd1000NQM1mmmm") // ASIMD
//INST(asimd_VCEQ_reg, "VCEG (register)", "111100110-CC--------1000---1----") // ASIMD
//INST(asimd_VMLA, "VMLA/VMLAL/VMLS/VMLSL", "1111001U0-CC--------1001---0----") // ASIMD