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https://git.suyu.dev/suyu/dynarmic.git
synced 2026-01-04 13:44:31 +01:00
Add optimization flags to disable specific optimizations
This commit is contained in:
MerryMage
parent
3eed024caf
commit
4ba1f8b9e7
13 changed files with 160 additions and 96 deletions
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@ -10,11 +10,11 @@
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#include "common/fp/fpsr.h"
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#include "testenv.h"
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namespace FP = Dynarmic::FP;
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using namespace Dynarmic;
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TEST_CASE("A64: ADD", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x8b020020); // ADD X0, X1, X2
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env.code_mem.emplace_back(0x14000000); // B .
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@ -35,7 +35,7 @@ TEST_CASE("A64: ADD", "[a64]") {
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TEST_CASE("A64: REV", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0xdac00c00); // REV X0, X0
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env.code_mem.emplace_back(0x5ac00821); // REV W1, W1
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@ -55,7 +55,7 @@ TEST_CASE("A64: REV", "[a64]") {
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TEST_CASE("A64: REV32", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0xdac00800); // REV32 X0, X0
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env.code_mem.emplace_back(0x14000000); // B .
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@ -71,7 +71,7 @@ TEST_CASE("A64: REV32", "[a64]") {
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TEST_CASE("A64: REV16", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0xdac00400); // REV16 X0, X0
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env.code_mem.emplace_back(0x5ac00421); // REV16 W1, W1
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@ -91,7 +91,7 @@ TEST_CASE("A64: REV16", "[a64]") {
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TEST_CASE("A64: AND", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x8a020020); // AND X0, X1, X2
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env.code_mem.emplace_back(0x14000000); // B .
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@ -112,7 +112,7 @@ TEST_CASE("A64: AND", "[a64]") {
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TEST_CASE("A64: Bitmasks", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x3200c3e0); // ORR W0, WZR, #0x01010101
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env.code_mem.emplace_back(0x320c8fe1); // ORR W1, WZR, #0x00F000F0
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@ -132,7 +132,7 @@ TEST_CASE("A64: Bitmasks", "[a64]") {
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TEST_CASE("A64: ANDS NZCV", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x6a020020); // ANDS W0, W1, W2
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env.code_mem.emplace_back(0x14000000); // B .
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@ -187,7 +187,7 @@ TEST_CASE("A64: ANDS NZCV", "[a64]") {
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TEST_CASE("A64: CBZ", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x34000060); // 0x00 : CBZ X0, label
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env.code_mem.emplace_back(0x320003e2); // 0x04 : MOV X2, 1
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@ -220,7 +220,7 @@ TEST_CASE("A64: CBZ", "[a64]") {
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TEST_CASE("A64: TBZ", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x36180060); // 0x00 : TBZ X0, 3, label
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env.code_mem.emplace_back(0x320003e2); // 0x04 : MOV X2, 1
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@ -264,7 +264,7 @@ TEST_CASE("A64: TBZ", "[a64]") {
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TEST_CASE("A64: FABD", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x6eb5d556); // FABD.4S V22, V10, V21
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env.code_mem.emplace_back(0x14000000); // B .
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@ -281,9 +281,9 @@ TEST_CASE("A64: FABD", "[a64]") {
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TEST_CASE("A64: 128-bit exclusive read/write", "[a64]") {
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A64TestEnv env;
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Dynarmic::ExclusiveMonitor monitor{1};
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ExclusiveMonitor monitor{1};
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Dynarmic::A64::UserConfig conf;
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A64::UserConfig conf;
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conf.callbacks = &env;
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conf.processor_id = 0;
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@ -291,7 +291,7 @@ TEST_CASE("A64: 128-bit exclusive read/write", "[a64]") {
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conf.global_monitor = &monitor;
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}
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Dynarmic::A64::Jit jit{conf};
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A64::Jit jit{conf};
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env.code_mem.emplace_back(0xc87f0861); // LDXP X1, X2, [X3]
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env.code_mem.emplace_back(0xc8241865); // STXP W4, X5, X6, [X3]
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@ -315,7 +315,7 @@ TEST_CASE("A64: 128-bit exclusive read/write", "[a64]") {
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TEST_CASE("A64: CNTPCT_EL0", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0xd53be021); // MRS X1, CNTPCT_EL0
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env.code_mem.emplace_back(0xd503201f); // NOP
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@ -336,7 +336,7 @@ TEST_CASE("A64: CNTPCT_EL0", "[a64]") {
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TEST_CASE("A64: FNMSUB 1", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x1f618a9c); // FNMSUB D28, D20, D1, D2
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env.code_mem.emplace_back(0x14000000); // B .
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@ -354,7 +354,7 @@ TEST_CASE("A64: FNMSUB 1", "[a64]") {
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TEST_CASE("A64: FNMSUB 2", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x1f2ab88e); // FNMSUB S14, S4, S10, S14
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env.code_mem.emplace_back(0x14000000); // B .
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@ -373,7 +373,7 @@ TEST_CASE("A64: FNMSUB 2", "[a64]") {
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TEST_CASE("A64: FMADD", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x1f5e0e4a); // FMADD D10, D18, D30, D3
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env.code_mem.emplace_back(0x14000000); // B .
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@ -392,7 +392,7 @@ TEST_CASE("A64: FMADD", "[a64]") {
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TEST_CASE("A64: FMLA.4S (denormal)", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x4e2fcccc); // FMLA.4S V12, V6, V15
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env.code_mem.emplace_back(0x14000000); // B .
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@ -411,7 +411,7 @@ TEST_CASE("A64: FMLA.4S (denormal)", "[a64]") {
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TEST_CASE("A64: FMLA.4S (0x80800000)", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x4e38cc2b); // FMLA.4S V11, V1, V24
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env.code_mem.emplace_back(0x14000000); // B .
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@ -433,7 +433,7 @@ TEST_CASE("A64: FMLA.4S (0x80800000)", "[a64]") {
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// x64 performs rounding before flushing-to-zero.
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TEST_CASE("A64: FMADD (0x80800000)", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x1f0f7319); // FMADD S25, S24, S15, S28
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env.code_mem.emplace_back(0x14000000); // B .
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@ -452,7 +452,7 @@ TEST_CASE("A64: FMADD (0x80800000)", "[a64]") {
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TEST_CASE("A64: FNEG failed to zero upper", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x2ea0fb50); // FNEG.2S V16, V26
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env.code_mem.emplace_back(0x2e207a1c); // SQNEG.8B V28, V16
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@ -471,7 +471,7 @@ TEST_CASE("A64: FNEG failed to zero upper", "[a64]") {
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TEST_CASE("A64: FRSQRTS", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x5eb8fcad); // FRSQRTS S13, S5, S24
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env.code_mem.emplace_back(0x14000000); // B .
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@ -493,7 +493,7 @@ TEST_CASE("A64: FRSQRTS", "[a64]") {
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TEST_CASE("A64: SQDMULH.8H (saturate)", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x4e62b420); // SQDMULH.8H V0, V1, V2
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env.code_mem.emplace_back(0x14000000); // B .
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@ -514,7 +514,7 @@ TEST_CASE("A64: SQDMULH.8H (saturate)", "[a64]") {
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TEST_CASE("A64: SQDMULH.4S (saturate)", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0x4ea2b420); // SQDMULH.4S V0, V1, V2
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env.code_mem.emplace_back(0x14000000); // B .
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@ -535,9 +535,9 @@ TEST_CASE("A64: SQDMULH.4S (saturate)", "[a64]") {
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TEST_CASE("A64: This is an infinite loop if fast dispatch is enabled", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::UserConfig conf{&env};
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conf.enable_fast_dispatch = false;
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Dynarmic::A64::Jit jit{conf};
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A64::UserConfig conf{&env};
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conf.optimizations &= ~OptimizationFlag::FastDispatch;
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A64::Jit jit{conf};
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env.code_mem.emplace_back(0x2ef998fa);
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env.code_mem.emplace_back(0x2ef41c11);
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@ -552,7 +552,7 @@ TEST_CASE("A64: This is an infinite loop if fast dispatch is enabled", "[a64]")
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TEST_CASE("A64: Optimization failure when folding ADD", "[a64]") {
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A64TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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A64::Jit jit{A64::UserConfig{&env}};
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env.code_mem.emplace_back(0xbc4f84be); // LDR S30, [X5], #248
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env.code_mem.emplace_back(0x9a0c00ea); // ADC X10, X7, X12
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