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VFP: Implement VADD.{F32,F64}
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14 changed files with 350 additions and 27 deletions
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@ -11,6 +11,7 @@
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#include "common/string_util.h"
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#include "frontend/arm_types.h"
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#include "frontend/decoder/arm.h"
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#include "frontend/decoder/vfp2.h"
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namespace Dynarmic {
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namespace Arm {
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@ -81,6 +82,16 @@ public:
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return "<internal error>";
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}
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std::string FPRegStr(bool dp_operation, size_t base, bool bit) {
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size_t reg_num;
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if (dp_operation) {
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reg_num = base + (bit ? 16 : 0);
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} else {
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reg_num = (base << 1) + (bit ? 1 : 0);
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}
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return Common::StringFromFormat("%c%zu", dp_operation ? 'd' : 's', reg_num);
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}
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// Branch instructions
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std::string arm_B(Cond cond, Imm24 imm24) {
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s32 offset = Common::SignExtend<26, s32>(imm24 << 2) + 8;
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@ -497,12 +508,22 @@ public:
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std::string arm_RFE() { return "ice"; }
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std::string arm_SETEND(bool E) { return "ice"; }
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std::string arm_SRS() { return "ice"; }
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// Floating point arithmetic instructions
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std::string vfp2_VADD(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
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return Common::StringFromFormat("vadd%s.%s %s, %s, %s", CondToString(cond), sz ? "f64" : "f32", FPRegStr(sz, Vd, D).c_str(), FPRegStr(sz, Vn, N).c_str(), FPRegStr(sz, Vm, M).c_str());
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}
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};
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std::string DisassembleArm(u32 instruction) {
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DisassemblerVisitor visitor;
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auto decoder = DecodeArm<DisassemblerVisitor>(instruction);
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return !decoder ? Common::StringFromFormat("UNKNOWN: %x", instruction) : decoder->call(visitor, instruction);
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if (auto vfp_decoder = DecodeVFP2<DisassemblerVisitor>(instruction)) {
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return vfp_decoder->call(visitor, instruction);
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} else if (auto decoder = DecodeArm<DisassemblerVisitor>(instruction)) {
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return decoder->call(visitor, instruction);
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} else {
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return Common::StringFromFormat("UNKNOWN: %x", instruction);
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}
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}
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} // namespace Arm
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