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A32: Implement ARM-mode UBFX

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Lioncash 2019-04-20 12:47:34 -04:00 • committed by MerryMage
parent 2970b34e3c
commit 47218ee65d
5 changed files with 39 additions and 0 deletions
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1
src/frontend/A32/decoder/arm.inc
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@ -169,6 +169,7 @@ INST(arm_BFI, "BFI", "cccc0111110vvvvvddddvvvvv001nnnn
INST(arm_CLZ, "CLZ", "cccc000101101111dddd11110001mmmm") // v5
INST(arm_NOP, "NOP", "----0011001000001111000000000000") // v6K
INST(arm_SEL, "SEL", "cccc01101000nnnndddd11111011mmmm") // v6
INST(arm_UBFX, "UBFX", "cccc0111111wwwwwddddvvvvv101nnnn") // v6T2
// Unsigned Sum of Absolute Differences instructions
INST(arm_USAD8, "USAD8", "cccc01111000dddd1111mmmm0001nnnn") // v6

3
src/frontend/A32/disassembler/disassembler_arm.cpp
View file

@ -601,6 +601,9 @@ public:
std::string arm_SEL(Cond cond, Reg n, Reg d, Reg m) {
return fmt::format("sel{} {}, {}, {}", CondToString(cond), d, n, m);
}
std::string arm_UBFX(Cond cond, Imm5 widthm1, Reg d, Imm5 lsb, Reg n) {
return fmt::format("ubfx{} {}, {}, #{}, #{}", CondToString(cond), d, n, lsb, widthm1 + 1);
}
// Unsigned sum of absolute difference functions
std::string arm_USAD8(Cond cond, Reg d, Reg m, Reg n) {

23
src/frontend/A32/translate/translate_arm/misc.cpp
View file

@ -85,4 +85,27 @@ bool ArmTranslatorVisitor::arm_SEL(Cond cond, Reg n, Reg d, Reg m) {
return true;
}
// UBFX<c> <Rd>, <Rn>, #<lsb>, #<width>
bool ArmTranslatorVisitor::arm_UBFX(Cond cond, Imm5 widthm1, Reg d, Imm5 lsb, Reg n) {
if (d == Reg::PC || n == Reg::PC) {
return UnpredictableInstruction();
}
const u32 msb = u32{lsb} + widthm1;
if (msb >= Common::BitSize<u32>()) {
return UnpredictableInstruction();
}
if (!ConditionPassed(cond)) {
return true;
}
const IR::U32 operand = ir.GetRegister(n);
const IR::U32 mask = ir.Imm32(Common::Ones<u32>(widthm1 + 1));
const IR::U32 result = ir.And(ir.LogicalShiftRight(operand, ir.Imm8(lsb)), mask);
ir.SetRegister(d, result);
return true;
}
} // namespace Dynarmic::A32

1
src/frontend/A32/translate/translate_arm/translate_arm.h
View file

@ -213,6 +213,7 @@ struct ArmTranslatorVisitor final {
bool arm_NOP() { return true; }
bool arm_RBIT(Cond cond, Reg d, Reg m);
bool arm_SEL(Cond cond, Reg n, Reg d, Reg m);
bool arm_UBFX(Cond cond, Imm5 widthm1, Reg d, Imm5 lsb, Reg n);
// Unsigned sum of absolute difference functions
bool arm_USAD8(Cond cond, Reg d, Reg m, Reg n);