mirror of
https://git.suyu.dev/suyu/dynarmic.git
synced 2026-01-05 22:18:16 +01:00
A64: Implement system register CTR_EL0
This commit is contained in:
parent
58fbb3ff1b
commit
1e15283d00
6 changed files with 22 additions and 0 deletions
|
|
@ -53,6 +53,10 @@ void IREmitter::DataMemoryBarrier() {
|
|||
Inst(Opcode::A64DataMemoryBarrier);
|
||||
}
|
||||
|
||||
IR::U32 IREmitter::GetCTR() {
|
||||
return Inst<IR::U32>(Opcode::A64GetCTR);
|
||||
}
|
||||
|
||||
IR::U32 IREmitter::GetDCZID() {
|
||||
return Inst<IR::U32>(Opcode::A64GetDCZID);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue