mirror of
https://git.suyu.dev/suyu/dynarmic.git
synced 2026-01-11 00:48:03 +01:00
jit_state: Split off CPSR.NZCV
This commit is contained in:
MerryMage
parent
a3432102b8
commit
19a7fb8992
12 changed files with 182 additions and 94 deletions
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@ -29,6 +29,8 @@
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namespace Dynarmic {
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namespace BackendX64 {
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using namespace Xbyak::util;
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constexpr u64 f32_negative_zero = 0x80000000u;
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constexpr u64 f32_nan = 0x7fc00000u;
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constexpr u64 f32_non_sign_mask = 0x7fffffffu;
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@ -43,12 +45,10 @@ constexpr u64 f64_max_s32 = 0x41dfffffffc00000u; // 2147483647 as a double
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constexpr u64 f64_min_u32 = 0x0000000000000000u; // 0 as a double
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static Xbyak::Address MJitStateReg(Arm::Reg reg) {
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using namespace Xbyak::util;
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return dword[r15 + offsetof(JitState, Reg) + sizeof(u32) * static_cast<size_t>(reg)];
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}
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static Xbyak::Address MJitStateExtReg(Arm::ExtReg reg) {
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using namespace Xbyak::util;
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if (Arm::IsSingleExtReg(reg)) {
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size_t index = static_cast<size_t>(reg) - static_cast<size_t>(Arm::ExtReg::S0);
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return dword[r15 + offsetof(JitState, ExtReg) + sizeof(u32) * index];
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@ -60,11 +60,6 @@ static Xbyak::Address MJitStateExtReg(Arm::ExtReg reg) {
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ASSERT_MSG(false, "Should never happen.");
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}
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static Xbyak::Address MJitStateCpsr_other() {
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using namespace Xbyak::util;
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return dword[r15 + offsetof(JitState, CPSR_other)];
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}
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static void EraseInstruction(IR::Block& block, IR::Inst* inst) {
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block.Instructions().erase(inst);
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inst->Invalidate();
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@ -217,9 +212,40 @@ void EmitX64::EmitSetCpsr(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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code->CallFunction(&SetCpsrImpl);
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}
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void EmitX64::EmitSetCpsrNZCV(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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auto args = reg_alloc.GetArgumentInfo(inst);
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if (args[0].IsImmediate()) {
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u32 imm = args[0].GetImmediateU32();
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code->mov(dword[r15 + offsetof(JitState, CPSR_nzcv)], u32(imm & 0xF0000000));
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} else {
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Xbyak::Reg32 a = reg_alloc.UseScratchGpr(args[0]).cvt32();
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code->and_(a, 0xF0000000);
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code->mov(dword[r15 + offsetof(JitState, CPSR_nzcv)], a);
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}
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}
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void EmitX64::EmitSetCpsrNZCVQ(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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auto args = reg_alloc.GetArgumentInfo(inst);
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if (args[0].IsImmediate()) {
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u32 imm = args[0].GetImmediateU32();
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code->mov(dword[r15 + offsetof(JitState, CPSR_nzcv)], u32(imm & 0xF0000000));
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code->mov(code->byte[r15 + offsetof(JitState, CPSR_q)], u8((imm & 0x08000000) != 0 ? 1 : 0));
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} else {
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Xbyak::Reg32 a = reg_alloc.UseScratchGpr(args[0]).cvt32();
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code->bt(a, 27);
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code->setc(code->byte[r15 + offsetof(JitState, CPSR_q)]);
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code->and_(a, 0xF0000000);
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code->mov(dword[r15 + offsetof(JitState, CPSR_nzcv)], a);
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}
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}
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void EmitX64::EmitGetNFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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Xbyak::Reg32 result = reg_alloc.ScratchGpr().cvt32();
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code->mov(result, MJitStateCpsr_other());
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code->mov(result, dword[r15 + offsetof(JitState, CPSR_nzcv)]);
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code->shr(result, 31);
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reg_alloc.DefineValue(inst, result);
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}
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@ -230,22 +256,22 @@ void EmitX64::EmitSetNFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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auto args = reg_alloc.GetArgumentInfo(inst);
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if (args[0].IsImmediate()) {
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if (args[0].GetImmediateU1()) {
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code->or_(MJitStateCpsr_other(), flag_mask);
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code->or_(dword[r15 + offsetof(JitState, CPSR_nzcv)], flag_mask);
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} else {
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code->and_(MJitStateCpsr_other(), ~flag_mask);
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code->and_(dword[r15 + offsetof(JitState, CPSR_nzcv)], ~flag_mask);
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}
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} else {
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Xbyak::Reg32 to_store = reg_alloc.UseScratchGpr(args[0]).cvt32();
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code->shl(to_store, flag_bit);
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code->and_(MJitStateCpsr_other(), ~flag_mask);
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code->or_(MJitStateCpsr_other(), to_store);
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code->and_(dword[r15 + offsetof(JitState, CPSR_nzcv)], ~flag_mask);
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code->or_(dword[r15 + offsetof(JitState, CPSR_nzcv)], to_store);
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}
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}
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void EmitX64::EmitGetZFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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Xbyak::Reg32 result = reg_alloc.ScratchGpr().cvt32();
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code->mov(result, MJitStateCpsr_other());
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code->mov(result, dword[r15 + offsetof(JitState, CPSR_nzcv)]);
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code->shr(result, 30);
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code->and_(result, 1);
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reg_alloc.DefineValue(inst, result);
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@ -257,22 +283,22 @@ void EmitX64::EmitSetZFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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auto args = reg_alloc.GetArgumentInfo(inst);
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if (args[0].IsImmediate()) {
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if (args[0].GetImmediateU1()) {
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code->or_(MJitStateCpsr_other(), flag_mask);
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code->or_(dword[r15 + offsetof(JitState, CPSR_nzcv)], flag_mask);
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} else {
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code->and_(MJitStateCpsr_other(), ~flag_mask);
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code->and_(dword[r15 + offsetof(JitState, CPSR_nzcv)], ~flag_mask);
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}
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} else {
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Xbyak::Reg32 to_store = reg_alloc.UseScratchGpr(args[0]).cvt32();
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code->shl(to_store, flag_bit);
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code->and_(MJitStateCpsr_other(), ~flag_mask);
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code->or_(MJitStateCpsr_other(), to_store);
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code->and_(dword[r15 + offsetof(JitState, CPSR_nzcv)], ~flag_mask);
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code->or_(dword[r15 + offsetof(JitState, CPSR_nzcv)], to_store);
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}
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}
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void EmitX64::EmitGetCFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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Xbyak::Reg32 result = reg_alloc.ScratchGpr().cvt32();
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code->mov(result, MJitStateCpsr_other());
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code->mov(result, dword[r15 + offsetof(JitState, CPSR_nzcv)]);
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code->shr(result, 29);
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code->and_(result, 1);
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reg_alloc.DefineValue(inst, result);
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@ -284,22 +310,22 @@ void EmitX64::EmitSetCFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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auto args = reg_alloc.GetArgumentInfo(inst);
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if (args[0].IsImmediate()) {
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if (args[0].GetImmediateU1()) {
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code->or_(MJitStateCpsr_other(), flag_mask);
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code->or_(dword[r15 + offsetof(JitState, CPSR_nzcv)], flag_mask);
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} else {
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code->and_(MJitStateCpsr_other(), ~flag_mask);
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code->and_(dword[r15 + offsetof(JitState, CPSR_nzcv)], ~flag_mask);
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}
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} else {
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Xbyak::Reg32 to_store = reg_alloc.UseScratchGpr(args[0]).cvt32();
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code->shl(to_store, flag_bit);
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code->and_(MJitStateCpsr_other(), ~flag_mask);
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code->or_(MJitStateCpsr_other(), to_store);
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code->and_(dword[r15 + offsetof(JitState, CPSR_nzcv)], ~flag_mask);
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code->or_(dword[r15 + offsetof(JitState, CPSR_nzcv)], to_store);
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}
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}
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void EmitX64::EmitGetVFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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Xbyak::Reg32 result = reg_alloc.ScratchGpr().cvt32();
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code->mov(result, MJitStateCpsr_other());
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code->mov(result, dword[r15 + offsetof(JitState, CPSR_nzcv)]);
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code->shr(result, 28);
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code->and_(result, 1);
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reg_alloc.DefineValue(inst, result);
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@ -311,22 +337,20 @@ void EmitX64::EmitSetVFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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auto args = reg_alloc.GetArgumentInfo(inst);
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if (args[0].IsImmediate()) {
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if (args[0].GetImmediateU1()) {
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code->or_(MJitStateCpsr_other(), flag_mask);
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code->or_(dword[r15 + offsetof(JitState, CPSR_nzcv)], flag_mask);
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} else {
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code->and_(MJitStateCpsr_other(), ~flag_mask);
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code->and_(dword[r15 + offsetof(JitState, CPSR_nzcv)], ~flag_mask);
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}
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} else {
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Xbyak::Reg32 to_store = reg_alloc.UseScratchGpr(args[0]).cvt32();
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code->shl(to_store, flag_bit);
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code->and_(MJitStateCpsr_other(), ~flag_mask);
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code->or_(MJitStateCpsr_other(), to_store);
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code->and_(dword[r15 + offsetof(JitState, CPSR_nzcv)], ~flag_mask);
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code->or_(dword[r15 + offsetof(JitState, CPSR_nzcv)], to_store);
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}
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}
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void EmitX64::EmitOrQFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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using namespace Xbyak::util;
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auto args = reg_alloc.GetArgumentInfo(inst);
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if (args[0].IsImmediate()) {
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if (args[0].GetImmediateU1())
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@ -339,16 +363,12 @@ void EmitX64::EmitOrQFlag(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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}
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void EmitX64::EmitGetGEFlags(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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using namespace Xbyak::util;
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Xbyak::Xmm result = reg_alloc.ScratchXmm();
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code->movd(result, dword[r15 + offsetof(JitState, CPSR_ge)]);
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reg_alloc.DefineValue(inst, result);
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}
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void EmitX64::EmitSetGEFlags(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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using namespace Xbyak::util;
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auto args = reg_alloc.GetArgumentInfo(inst);
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ASSERT(!args[0].IsImmediate());
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@ -361,9 +381,39 @@ void EmitX64::EmitSetGEFlags(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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}
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}
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void EmitX64::EmitBXWritePC(RegAlloc& reg_alloc, IR::Block& block, IR::Inst* inst) {
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using namespace Xbyak::util;
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void EmitX64::EmitSetGEFlagsCompressed(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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auto args = reg_alloc.GetArgumentInfo(inst);
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if (args[0].IsImmediate()) {
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u32 imm = args[0].GetImmediateU32();
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u32 ge = 0;
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ge |= Common::Bit<19>(imm) ? 0xFF000000 : 0;
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ge |= Common::Bit<18>(imm) ? 0x00FF0000 : 0;
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ge |= Common::Bit<17>(imm) ? 0x0000FF00 : 0;
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ge |= Common::Bit<16>(imm) ? 0x000000FF : 0;
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code->mov(dword[r15 + offsetof(JitState, CPSR_ge)], ge);
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} else if (code->DoesCpuSupport(Xbyak::util::Cpu::tBMI2)) {
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Xbyak::Reg32 a = reg_alloc.UseScratchGpr(args[0]).cvt32();
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Xbyak::Reg32 b = reg_alloc.ScratchGpr().cvt32();
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code->mov(b, 0x01010101);
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code->shr(a, 16);
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code->pdep(a, a, b);
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code->imul(a, a, 0xFF);
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code->mov(dword[r15 + offsetof(JitState, CPSR_ge)], a);
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} else {
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Xbyak::Reg32 a = reg_alloc.UseScratchGpr(args[0]).cvt32();
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code->shr(a, 16);
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code->and_(a, 0xF);
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code->imul(a, a, 0x00204081);
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code->and_(a, 0x01010101);
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code->imul(a, a, 0xFF);
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code->mov(dword[r15 + offsetof(JitState, CPSR_ge)], a);
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}
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}
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void EmitX64::EmitBXWritePC(RegAlloc& reg_alloc, IR::Block& block, IR::Inst* inst) {
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auto args = reg_alloc.GetArgumentInfo(inst);
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auto& arg = args[0];
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@ -414,8 +464,6 @@ void EmitX64::EmitBXWritePC(RegAlloc& reg_alloc, IR::Block& block, IR::Inst* ins
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}
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void EmitX64::EmitCallSupervisor(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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using namespace Xbyak::util;
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reg_alloc.HostCall(nullptr);
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code->SwitchMxcsrOnExit();
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@ -458,16 +506,12 @@ void EmitX64::EmitSetFpscr(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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}
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void EmitX64::EmitGetFpscrNZCV(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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using namespace Xbyak::util;
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Xbyak::Reg32 result = reg_alloc.ScratchGpr().cvt32();
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code->mov(result, dword[r15 + offsetof(JitState, FPSCR_nzcv)]);
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reg_alloc.DefineValue(inst, result);
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}
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void EmitX64::EmitSetFpscrNZCV(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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using namespace Xbyak::util;
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auto args = reg_alloc.GetArgumentInfo(inst);
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Xbyak::Reg32 value = reg_alloc.UseGpr(args[0]).cvt32();
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@ -2140,7 +2184,6 @@ void EmitX64::EmitPackedSelect(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst)
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}
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static void DenormalsAreZero32(BlockOfCode* code, Xbyak::Xmm xmm_value, Xbyak::Reg32 gpr_scratch) {
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using namespace Xbyak::util;
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Xbyak::Label end;
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// We need to report back whether we've found a denormal on input.
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@ -2157,7 +2200,6 @@ static void DenormalsAreZero32(BlockOfCode* code, Xbyak::Xmm xmm_value, Xbyak::R
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}
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static void DenormalsAreZero64(BlockOfCode* code, Xbyak::Xmm xmm_value, Xbyak::Reg64 gpr_scratch) {
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using namespace Xbyak::util;
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Xbyak::Label end;
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auto mask = code->MConst(f64_non_sign_mask);
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@ -2176,7 +2218,6 @@ static void DenormalsAreZero64(BlockOfCode* code, Xbyak::Xmm xmm_value, Xbyak::R
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}
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static void FlushToZero32(BlockOfCode* code, Xbyak::Xmm xmm_value, Xbyak::Reg32 gpr_scratch) {
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using namespace Xbyak::util;
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Xbyak::Label end;
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code->movd(gpr_scratch, xmm_value);
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@ -2190,7 +2231,6 @@ static void FlushToZero32(BlockOfCode* code, Xbyak::Xmm xmm_value, Xbyak::Reg32
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}
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static void FlushToZero64(BlockOfCode* code, Xbyak::Xmm xmm_value, Xbyak::Reg64 gpr_scratch) {
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using namespace Xbyak::util;
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Xbyak::Label end;
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auto mask = code->MConst(f64_non_sign_mask);
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@ -2430,7 +2470,6 @@ static void SetFpscrNzcvFromFlags(BlockOfCode* code, RegAlloc& reg_alloc) {
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reg_alloc.ScratchGpr({HostLoc::RCX}); // shifting requires use of cl
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Xbyak::Reg32 nzcv = reg_alloc.ScratchGpr().cvt32();
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using namespace Xbyak::util;
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code->mov(nzcv, 0x28630000);
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code->sete(cl);
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@ -2749,14 +2788,10 @@ void EmitX64::EmitFPU32ToDouble(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst)
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void EmitX64::EmitClearExclusive(RegAlloc&, IR::Block&, IR::Inst*) {
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using namespace Xbyak::util;
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code->mov(code->byte[r15 + offsetof(JitState, exclusive_state)], u8(0));
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}
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void EmitX64::EmitSetExclusive(RegAlloc& reg_alloc, IR::Block&, IR::Inst* inst) {
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using namespace Xbyak::util;
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auto args = reg_alloc.GetArgumentInfo(inst);
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ASSERT(args[1].IsImmediate());
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Xbyak::Reg32 address = reg_alloc.UseGpr(args[0]).cvt32();
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@ -2775,7 +2810,6 @@ static void ReadMemory(BlockOfCode* code, RegAlloc& reg_alloc, IR::Inst* inst, U
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return;
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}
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using namespace Xbyak::util;
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reg_alloc.UseScratch(args[0], ABI_PARAM1);
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@ -2829,7 +2863,6 @@ static void WriteMemory(BlockOfCode* code, RegAlloc& reg_alloc, IR::Inst* inst,
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return;
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}
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using namespace Xbyak::util;
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reg_alloc.ScratchGpr({ABI_RETURN});
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reg_alloc.UseScratch(args[0], ABI_PARAM1);
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@ -2916,7 +2949,6 @@ static void ExclusiveWrite(BlockOfCode* code, RegAlloc& reg_alloc, IR::Inst* ins
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Xbyak::Reg32 passed = reg_alloc.ScratchGpr().cvt32();
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Xbyak::Reg32 tmp = code->ABI_RETURN.cvt32(); // Use one of the unusued HostCall registers.
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using namespace Xbyak::util;
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Xbyak::Label end;
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code->mov(passed, u32(1));
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@ -3219,18 +3251,15 @@ void EmitX64::EmitCoprocStoreWords(RegAlloc& reg_alloc, IR::Block&, IR::Inst* in
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}
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void EmitX64::EmitAddCycles(size_t cycles) {
|
||||
using namespace Xbyak::util;
|
||||
ASSERT(cycles < std::numeric_limits<u32>::max());
|
||||
code->sub(qword[r15 + offsetof(JitState, cycles_remaining)], static_cast<u32>(cycles));
|
||||
}
|
||||
|
||||
static Xbyak::Label EmitCond(BlockOfCode* code, Arm::Cond cond) {
|
||||
using namespace Xbyak::util;
|
||||
|
||||
Xbyak::Label label;
|
||||
|
||||
const Xbyak::Reg32 cpsr = eax;
|
||||
code->mov(cpsr, MJitStateCpsr_other());
|
||||
code->mov(cpsr, dword[r15 + offsetof(JitState, CPSR_nzcv)]);
|
||||
|
||||
constexpr size_t n_shift = 31;
|
||||
constexpr size_t z_shift = 30;
|
||||
|
|
@ -3383,8 +3412,6 @@ static u32 CalculateCpsr_et(const IR::LocationDescriptor& desc) {
|
|||
}
|
||||
|
||||
void EmitX64::EmitTerminal(IR::Term::LinkBlock terminal, IR::LocationDescriptor initial_location) {
|
||||
using namespace Xbyak::util;
|
||||
|
||||
if (CalculateCpsr_et(terminal.next) != CalculateCpsr_et(initial_location)) {
|
||||
code->mov(dword[r15 + offsetof(JitState, CPSR_et)], CalculateCpsr_et(terminal.next));
|
||||
}
|
||||
|
|
@ -3410,8 +3437,6 @@ void EmitX64::EmitTerminal(IR::Term::LinkBlock terminal, IR::LocationDescriptor
|
|||
}
|
||||
|
||||
void EmitX64::EmitTerminal(IR::Term::LinkBlockFast terminal, IR::LocationDescriptor initial_location) {
|
||||
using namespace Xbyak::util;
|
||||
|
||||
if (CalculateCpsr_et(terminal.next) != CalculateCpsr_et(initial_location)) {
|
||||
code->mov(dword[r15 + offsetof(JitState, CPSR_et)], CalculateCpsr_et(terminal.next));
|
||||
}
|
||||
|
|
@ -3425,8 +3450,6 @@ void EmitX64::EmitTerminal(IR::Term::LinkBlockFast terminal, IR::LocationDescrip
|
|||
}
|
||||
|
||||
void EmitX64::EmitTerminal(IR::Term::PopRSBHint, IR::LocationDescriptor) {
|
||||
using namespace Xbyak::util;
|
||||
|
||||
// This calculation has to match up with IREmitter::PushRSB
|
||||
// TODO: Optimization is available here based on known state of FPSCR_mode and CPSR_et.
|
||||
code->mov(ecx, MJitStateReg(Arm::Reg::PC));
|
||||
|
|
@ -3453,8 +3476,6 @@ void EmitX64::EmitTerminal(IR::Term::If terminal, IR::LocationDescriptor initial
|
|||
}
|
||||
|
||||
void EmitX64::EmitTerminal(IR::Term::CheckHalt terminal, IR::LocationDescriptor initial_location) {
|
||||
using namespace Xbyak::util;
|
||||
|
||||
code->cmp(code->byte[r15 + offsetof(JitState, halt_requested)], u8(0));
|
||||
code->jne(code->GetForceReturnFromRunCodeAddress());
|
||||
EmitTerminal(terminal.else_, initial_location);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue