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Implemented BSL, BIC, BIT and BIF vector instructions

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FernandoS27 2018-01-27 14:23:55 -04:00 • committed by MerryMage
parent 7a87e3fc55
commit 15871910af
2 changed files with 50 additions and 3 deletions
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47
src/frontend/A64/translate/impl/simd_three_same.cpp
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@ -80,11 +80,13 @@ bool TranslatorVisitor::BIC_asimd_reg(bool Q, Vec Vm, Vec Vn, Vec Vd) {
const IR::U128 operand2 = V(datasize, Vm);
IR::U128 result = ir.VectorAnd(operand1, ir.VectorNot(operand2));
if (datasize == 64) {
result = ir.VectorZeroUpper(result);
}
V(datasize, Vd, result);
return true;
}
@ -161,4 +163,49 @@ bool TranslatorVisitor::EOR_asimd(bool Q, Vec Vm, Vec Vn, Vec Vd) {
return true;
}
bool TranslatorVisitor::BIF(bool Q, Vec Vm, Vec Vn, Vec Vd) {
const size_t datasize = Q ? 128 : 64;
auto operand1 = V(datasize, Vd);
auto operand4 = V(datasize, Vn);
auto operand3 = ir.VectorNot(V(datasize, Vm));
auto result = ir.VectorEor(operand1,
ir.VectorAnd(ir.VectorEor(operand1, operand4), operand3));
V(datasize, Vd, result);
return true;
}
bool TranslatorVisitor::BIT(bool Q, Vec Vm, Vec Vn, Vec Vd) {
const size_t datasize = Q ? 128 : 64;
auto operand1 = V(datasize, Vd);
auto operand4 = V(datasize, Vn);
auto operand3 = V(datasize, Vm);
auto result = ir.VectorEor(operand1,
ir.VectorAnd(ir.VectorEor(operand1, operand4), operand3));
V(datasize, Vd, result);
return true;
}
bool TranslatorVisitor::BSL(bool Q, Vec Vm, Vec Vn, Vec Vd) {
const size_t datasize = Q ? 128 : 64;
auto operand4 = V(datasize, Vn);
auto operand1 = V(datasize, Vm);
auto operand3 = V(datasize, Vd);
auto result = ir.VectorEor(operand1,
ir.VectorAnd(ir.VectorEor(operand1, operand4), operand3));
V(datasize, Vd, result);
return true;
}
} // namespace Dynarmic::A64