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A64: Implement FRECPS, vector/scalar single/double variants

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This commit is contained in:
MerryMage 2018-07-25 19:11:43 +01:00
parent 901bd9b4e2
commit 10de36394e
3 changed files with 27 additions and 2 deletions
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4
src/frontend/A64/decoder/a64.inc
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@ -343,7 +343,7 @@ INST(DUP_elt_1, "DUP (element)", "01011
//INST(FCMEQ_reg_1, "FCMEQ (register)", "01011110010mmmmm001001nnnnnddddd")
INST(FCMEQ_reg_2, "FCMEQ (register)", "010111100z1mmmmm111001nnnnnddddd")
//INST(FRECPS_1, "FRECPS", "01011110010mmmmm001111nnnnnddddd")
//INST(FRECPS_2, "FRECPS", "010111100z1mmmmm111111nnnnnddddd")
INST(FRECPS_2, "FRECPS", "010111100z1mmmmm111111nnnnnddddd")
//INST(FRSQRTS_1, "FRSQRTS", "01011110110mmmmm001111nnnnnddddd")
INST(FRSQRTS_2, "FRSQRTS", "010111101z1mmmmm111111nnnnnddddd")
//INST(FCMGE_reg_1, "FCMGE (register)", "01111110010mmmmm001001nnnnnddddd")
@ -731,7 +731,7 @@ INST(FADD_2, "FADD (vector)", "0Q001
//INST(FMULX_vec_4, "FMULX", "0Q0011100z1mmmmm110111nnnnnddddd")
INST(FCMEQ_reg_4, "FCMEQ (register)", "0Q0011100z1mmmmm111001nnnnnddddd")
//INST(FMLAL_vec_1, "FMLAL, FMLAL2 (vector)", "0Q0011100z1mmmmm111011nnnnnddddd")
//INST(FRECPS_4, "FRECPS", "0Q0011100z1mmmmm111111nnnnnddddd")
INST(FRECPS_4, "FRECPS", "0Q0011100z1mmmmm111111nnnnnddddd")
INST(AND_asimd, "AND (vector)", "0Q001110001mmmmm000111nnnnnddddd")
INST(BIC_asimd_reg, "BIC (vector, register)", "0Q001110011mmmmm000111nnnnnddddd")
//INST(FMINNM_2, "FMINNM (vector)", "0Q0011101z1mmmmm110001nnnnnddddd")