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emit_x64_floating_point: Implement accurate fallback for FPMulAdd{32,64}
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3 changed files with 56 additions and 14 deletions
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@ -334,3 +334,40 @@ TEST_CASE("A64: CNTPCT_EL0", "[a64]") {
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REQUIRE(jit.GetRegister(3) == 7);
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}
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TEST_CASE("A64: FNMSUB 1", "[a64]") {
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TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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env.code_mem[0] = 0x1f618a9c; // FNMSUB D28, D20, D1, D2
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env.code_mem[1] = 0x14000000; // B .
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jit.SetPC(0);
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jit.SetVector(20, {0xe73a51346164bd6c, 0x8080000000002b94});
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jit.SetVector(1, {0xbf8000007fffffff, 0xffffffff00002b94});
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jit.SetVector(2, {0x0000000000000000, 0xc79b271e3f000000});
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env.ticks_left = 2;
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jit.Run();
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REQUIRE(jit.GetVector(28) == Vector{0x66ca513533ee6076, 0x0000000000000000});
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}
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TEST_CASE("A64: FNMSUB 2", "[a64]") {
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TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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env.code_mem[0] = 0x1f2ab88e; // FNMSUB S14, S4, S10, S14
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env.code_mem[1] = 0x14000000; // B .
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jit.SetPC(0);
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jit.SetVector(4, {0x3c9623b101398437, 0x7ff0abcd0ba98d27});
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jit.SetVector(10, {0xffbfffff3eaaaaab, 0x3f0000003f8147ae});
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jit.SetVector(14, {0x80000000007fffff, 0xe73a513400000000});
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jit.SetFpcr(0x00400000);
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env.ticks_left = 2;
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jit.Run();
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REQUIRE(jit.GetVector(14) == Vector{0x0000000080045284, 0x0000000000000000});
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}
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@ -77,8 +77,6 @@ static u32 GenRandomInst(u64 pc, bool is_last_inst) {
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"LDLAR",
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// Dynarmic and QEMU currently differ on how the exclusive monitor's address range works.
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"STXR", "STLXR", "STXP", "STLXP", "LDXR", "LDAXR", "LDXP", "LDAXP",
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// Approximation. Produces inaccurate results.
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"FMADD_float", "FMSUB_float", "FNMADD_float", "FNMSUB_float",
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};
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for (const auto& [fn, bitstring] : list) {
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@ -116,8 +114,6 @@ static u32 GenFloatInst(u64 pc, bool is_last_inst) {
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const std::vector<std::string> do_not_test {
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// QEMU's implementation of FCVT is incorrect
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"FCVT_float",
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// Approximation. Produces incorrect results.
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"FMADD_float", "FMSUB_float", "FNMADD_float", "FNMSUB_float",
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// Requires investigation (temporarily disabled).
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"FDIV_1", "FDIV_2",
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};
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