mirror of
https://git.suyu.dev/suyu/dynarmic.git
synced 2025-12-30 19:24:42 +01:00
Squashed 'externals/xbyak/' changes from 671fc805..4a6fac8a
4a6fac8a update version to 5.77 801cf3fd cosmetic change of getNumCores d397e824 fix number of cores that share LLC cache a669e092 support non-intel-cpu visual studio af5f422e Merge branch 'fenghaitao-guard_x86' into develop 9b98dc17 Guard x86 specific codes with "#if defined(__i386__) || defined(__x86_64__)" dd4173e1 move some member variables input private f72646a7 update version 4612528f format change 4b95e862 Merge branch 'shelleygoel-master' 4c262fa6 add functionality to get num of cores using x2APIC ID bc70e7e1 recover Xbyak::CastTo d09a230f unlink Label when LabelManager is destroyed 973e8597 update version afdb9fe9 Xbyak::CastTo is removed b011aca4 add RegRip +/- int acae93cd increase max temp regs for StackFrame ea4e3562 util::StackFrame uses push/pop instead of mov 42462ef9 use evex encoding for vpslld/vpslldq/vpsraw/...(reg, mem, imm); da9117a9 update version of readme.md d35f4fb7 fix the encoding of vinsertps for disp8N 1de435ed bf uses Label class 613922bd add Label L() for convenience 43e15583 fix typo 93579ee6 add protect-re.cpp 60004b5c fix url of protect-re.cpp 348b2709 fix typo of doc f34f6ed5 update manual 232110be update test 82b78bf0 add setProtectMode dd8b290f put warning message if pageSize != 4096 64775ca2 a little refactoring 7c3e7b85 fix wrong VSIB encoding with idx >= 16 git-subtree-dir: externals/xbyak git-subtree-split: 4a6fac8ade404f667b94170f713367fe7da2a852
This commit is contained in:
MerryMage
parent
dbb1f8cf37
commit
080b4b3aff
17 changed files with 994 additions and 489 deletions
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@ -73,7 +73,6 @@ const uint64 YMM_ER = 1ULL << 36;
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const uint64 VM32Y_K = 1ULL << 37;
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const uint64 IMM_2 = 1ULL << 38;
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const uint64 IMM = IMM_1 | IMM_2;
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const uint64 XMM = _XMM | _XMM2;
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const uint64 YMM = _YMM | _YMM2;
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const uint64 K = 1ULL << 43;
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const uint64 _ZMM = 1ULL << 44;
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@ -90,7 +89,10 @@ const uint64 ZMM_SAE = 1ULL << 48;
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const uint64 ZMM_ER = 1ULL << 49;
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#ifdef XBYAK64
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const uint64 _XMM3 = 1ULL << 50;
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#else
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const uint64 _XMM3 = 0;
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#endif
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const uint64 XMM = _XMM | _XMM2 | _XMM3;
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const uint64 XMM_SAE = 1ULL << 51;
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#ifdef XBYAK64
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const uint64 XMM_KZ = 1ULL << 52;
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@ -352,7 +354,8 @@ class Test {
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case VM32Y_K:
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return isXbyak_ ? "ptr [64+ymm13*2+r13] | k6" : "[64+ymm13*2+r13]{k6}";
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case VM32Z_K:
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return isXbyak_ ? "ptr [64+zmm13*2+r13] | k6" : "[64+zmm13*2+r13]{k6}";
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if (idx & 1) return isXbyak_ ? "ptr [64+zmm10*8+r9] | k6" : "[64+zmm10*8+r9]{k6}";
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return isXbyak_ ? "ptr [64+zmm30*2+r13] | k6" : "[64+zmm30*2+r13]{k6}";
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case VM32Z:
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return isXbyak_ ? "ptr [64+zmm13*2+rcx]" : "[64+zmm13*2+rcx]";
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case M_1to2: return isXbyak_ ? "ptr_b [eax+32]" : "[eax+32]{1to2}";
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@ -607,7 +610,7 @@ public:
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};
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for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl *p = &tbl[i];
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put(p->name, K, _XMM, _XMM | MEM, IMM8);
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put(p->name, K, XMM, _XMM | MEM, IMM8);
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if (!p->supportYMM) continue;
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put(p->name, K, _YMM, _YMM | MEM, IMM8);
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put(p->name, K, _ZMM, _ZMM | MEM, IMM8);
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@ -626,10 +629,10 @@ public:
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};
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for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl *p = &tbl[i];
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put(p->name, XMM | _XMM3, XMM_SAE | XMM | MEM);
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put(p->name, XMM, XMM_SAE | XMM | MEM);
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}
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}
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put("vcomiss", _XMM3, XMM | MEM);
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put("vcomiss", XMM, _XMM3 | MEM);
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put("vcomiss", XMM, XMM_SAE);
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#endif
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}
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@ -673,10 +676,10 @@ public:
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"vpbroadcastq",
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};
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for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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put(tbl[i], XMM_KZ | ZMM_KZ, _XMM | _MEM);
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put(tbl[i], XMM_KZ | ZMM_KZ, XMM | _MEM);
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}
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}
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put("vbroadcasti32x2", XMM_KZ | YMM_KZ | ZMM_KZ, _XMM | _MEM);
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put("vbroadcasti32x2", XMM_KZ | YMM_KZ | ZMM_KZ, XMM | _MEM);
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put("vbroadcasti32x4", YMM_KZ | ZMM_KZ, _MEM);
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put("vbroadcasti64x2", YMM_KZ | ZMM_KZ, _MEM);
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put("vbroadcasti32x8", ZMM_KZ, _MEM);
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@ -684,14 +687,14 @@ public:
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}
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void putMisc1()
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{
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put("vmaskmovps", XMM, XMM, MEM);
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put("vmaskmovps", _XMM, _XMM, MEM);
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put("vmaskmovps", YMM, YMM, MEM);
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put("vmaskmovpd", YMM, YMM, MEM);
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put("vmaskmovpd", XMM, XMM, MEM);
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put("vmaskmovpd", _XMM, _XMM, MEM);
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put("vmaskmovps", MEM, XMM, XMM);
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put("vmaskmovpd", MEM, XMM, XMM);
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put("vmaskmovps", MEM, _XMM, _XMM);
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put("vmaskmovpd", MEM, _XMM, _XMM);
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put("vbroadcastf128", YMM, MEM);
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put("vbroadcasti128", YMM, MEM);
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@ -710,8 +713,8 @@ public:
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}
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}
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put("vinsertf128", YMM, YMM, XMM | MEM, IMM8);
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put("vinserti128", YMM, YMM, XMM | MEM, IMM8);
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put("vinsertf128", YMM, YMM, _XMM | _XMM2 | MEM, IMM8);
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put("vinserti128", YMM, YMM, _XMM | _XMM2 | MEM, IMM8);
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put("vperm2f128", YMM, YMM, YMM | MEM, IMM8);
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put("vperm2i128", YMM, YMM, YMM | MEM, IMM8);
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@ -721,9 +724,9 @@ public:
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};
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for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const char *name = tbl[i];
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put(name, XMM, XMM, MEM);
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put(name, _XMM, _XMM, MEM);
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put(name, YMM, YMM, MEM);
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put(name, MEM, XMM, XMM);
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put(name, MEM, _XMM, _XMM);
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put(name, MEM, YMM, YMM);
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}
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}
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@ -760,29 +763,29 @@ public:
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put(name, MEM, ZMM);
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put(name, ZMM, MEM);
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#ifdef XBYAK64
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put(name, MEM, _XMM3);
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put(name, _XMM3, MEM);
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put(name, MEM, XMM);
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put(name, XMM, MEM);
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#endif
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}
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}
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void put_vmov()
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{
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#ifdef XBYAK64
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put("vmovd", _XMM3, MEM|REG32);
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put("vmovd", MEM|REG32, _XMM3);
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put("vmovq", _XMM3, MEM|REG64|XMM);
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put("vmovq", MEM|REG64|XMM, _XMM3);
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put("vmovhlps", _XMM3, _XMM3, _XMM3);
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put("vmovlhps", _XMM3, _XMM3, _XMM3);
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put("vmovntdqa", _XMM3|_YMM3|ZMM, MEM);
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put("vmovntdq", MEM, _XMM3 | _YMM3 | ZMM);
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put("vmovntpd", MEM, _XMM3 | _YMM3 | ZMM);
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put("vmovntps", MEM, _XMM3 | _YMM3 | ZMM);
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put("vmovd", XMM, MEM|REG32);
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put("vmovd", MEM|REG32, XMM);
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put("vmovq", XMM, MEM|REG64|XMM);
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put("vmovq", MEM|REG64|XMM, XMM);
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put("vmovhlps", XMM, _XMM3, _XMM3);
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put("vmovlhps", XMM, _XMM3, _XMM3);
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put("vmovntdqa", XMM|_YMM3|ZMM, MEM);
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put("vmovntdq", MEM, XMM | _YMM3 | ZMM);
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put("vmovntpd", MEM, XMM | _YMM3 | ZMM);
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put("vmovntps", MEM, XMM | _YMM3 | ZMM);
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put("vmovsd", XMM_KZ, _XMM3, _XMM3);
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put("vmovsd", XMM_KZ, XMM, _XMM3);
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put("vmovsd", XMM_KZ, MEM);
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put("vmovsd", MEM_K, XMM);
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put("vmovss", XMM_KZ, _XMM3, _XMM3);
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put("vmovss", XMM_KZ, XMM, _XMM3);
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put("vmovss", XMM_KZ, MEM);
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put("vmovss", MEM_K, XMM);
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@ -797,7 +800,7 @@ public:
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};
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for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const char *name = tbl[i];
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put(name, XMM_KZ, _XMM, _XMM | MEM, IMM);
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put(name, XMM_KZ, XMM, _XMM | MEM, IMM);
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put(name, _YMM3, _YMM3, _YMM3 | _MEM, IMM);
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put(name, _ZMM, _ZMM, _ZMM | _MEM, IMM);
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}
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@ -810,7 +813,7 @@ public:
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"vmovlps",
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};
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for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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put(tbl[i], _XMM3, _XMM3, MEM);
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put(tbl[i], XMM, _XMM3, MEM);
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put(tbl[i], MEM, _XMM3);
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}
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}
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@ -836,11 +839,11 @@ public:
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};
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for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl& p = tbl[i];
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put(p.name, _XMM|XMM_KZ, _XMM|MEM);
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put(p.name, XMM|XMM_KZ, _XMM|MEM);
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put(p.name, _YMM|YMM_KZ, _YMM|MEM);
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put(p.name, _ZMM|ZMM_KZ, _ZMM|MEM);
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if (!p.M_X) continue;
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put(p.name, MEM|MEM_K, _XMM);
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put(p.name, MEM|MEM_K, XMM);
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put(p.name, MEM|MEM_K, _YMM);
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put(p.name, MEM|MEM_K, _ZMM);
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}
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@ -857,7 +860,7 @@ public:
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put("vpabsd", ZMM_KZ, M_1to16 | _MEM);
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put("vpabsq", ZMM_KZ, M_1to8 | _MEM);
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put("vbroadcastf32x2", YMM_KZ | ZMM_KZ, _XMM | _MEM);
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put("vbroadcastf32x2", YMM_KZ | ZMM_KZ, XMM | _MEM);
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put("vbroadcastf32x4", YMM_KZ | ZMM_KZ, _MEM);
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put("vbroadcastf64x2", YMM_KZ | ZMM_KZ, _MEM);
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@ -879,7 +882,7 @@ public:
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};
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for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl& p = tbl[i];
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put(p.name, XMM_KZ, _XMM, _XMM|p.mem);
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put(p.name, XMM_KZ, XMM, _XMM|p.mem);
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}
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}
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void put512_X3()
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@ -891,54 +894,54 @@ public:
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uint64_t x2;
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uint64_t xm;
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} tbl[] = {
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{ "vpacksswb", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpacksswb", XMM_KZ, XMM, _XMM | _MEM },
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{ "vpacksswb", YMM_KZ, _YMM, _YMM | _MEM },
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{ "vpacksswb", ZMM_KZ, _ZMM, _ZMM | _MEM },
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{ "vpackssdw", XMM_KZ, _XMM, _XMM | M_1to4 | _MEM },
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{ "vpackssdw", XMM_KZ, XMM, _XMM | M_1to4 | _MEM },
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{ "vpackssdw", YMM_KZ, _YMM, _YMM | M_1to8 | _MEM },
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{ "vpackssdw", ZMM_KZ, _ZMM, _ZMM | M_1to16 | _MEM },
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{ "vpackusdw", XMM_KZ, _XMM, _XMM | M_1to4 | _MEM },
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{ "vpackusdw", XMM_KZ, XMM, _XMM | M_1to4 | _MEM },
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{ "vpackusdw", YMM_KZ, _YMM, _YMM | M_1to8 | _MEM },
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{ "vpackusdw", ZMM_KZ, _ZMM, _ZMM | M_1to16 | _MEM },
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{ "vpackuswb", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpackuswb", XMM_KZ, XMM, _XMM | _MEM },
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{ "vpackuswb", YMM_KZ, _YMM, _YMM | _MEM },
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{ "vpackuswb", ZMM_KZ, _ZMM, _ZMM | _MEM },
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{ "vpaddb", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpaddb", XMM_KZ, XMM, _XMM | _MEM },
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{ "vpaddw", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpaddd", XMM_KZ, _XMM, _XMM | M_1to4 | _MEM },
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{ "vpaddq", ZMM_KZ, _ZMM, M_1to8 | _MEM },
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{ "vpaddsb", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpaddsb", XMM_KZ, XMM, _XMM | _MEM },
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{ "vpaddsb", ZMM_KZ, _ZMM, _ZMM | _MEM },
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{ "vpaddsw", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpaddsw", XMM_KZ, XMM, _XMM | _MEM },
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{ "vpaddsw", ZMM_KZ, _ZMM, _ZMM | _MEM },
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{ "vpaddusb", XMM_KZ, _XMM, _XMM | MEM },
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{ "vpaddusb", XMM_KZ, XMM, _XMM | MEM },
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{ "vpaddusb", ZMM_KZ, _ZMM, _ZMM | MEM },
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{ "vpaddusw", XMM_KZ, _XMM, _XMM | MEM },
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{ "vpaddusw", XMM_KZ, XMM, _XMM | MEM },
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{ "vpaddusw", ZMM_KZ, _ZMM, _ZMM | MEM },
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{ "vpsubb", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpsubw", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpsubd", XMM_KZ, _XMM, _XMM | M_1to4 | _MEM },
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{ "vpsubb", XMM_KZ, XMM, _XMM | _MEM },
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{ "vpsubw", XMM_KZ, XMM, _XMM | _MEM },
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{ "vpsubd", XMM_KZ, XMM, _XMM | M_1to4 | _MEM },
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{ "vpsubq", ZMM_KZ, _ZMM, M_1to8 | _MEM },
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{ "vpsubsb", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpsubsb", XMM_KZ, XMM, _XMM | _MEM },
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{ "vpsubsb", ZMM_KZ, _ZMM, _ZMM | _MEM },
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{ "vpsubsw", XMM_KZ, _XMM, _XMM | _MEM },
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{ "vpsubsw", XMM_KZ, XMM, _XMM | _MEM },
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{ "vpsubsw", ZMM_KZ, _ZMM, _ZMM | _MEM },
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{ "vpsubusb", XMM_KZ, _XMM, _XMM | MEM },
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{ "vpsubusb", XMM_KZ, XMM, _XMM | MEM },
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{ "vpsubusb", ZMM_KZ, _ZMM, _ZMM | MEM },
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{ "vpsubusw", XMM_KZ, _XMM, _XMM | MEM },
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{ "vpsubusw", XMM_KZ, XMM, _XMM | MEM },
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{ "vpsubusw", ZMM_KZ, _ZMM, _ZMM | MEM },
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{ "vpandd", ZMM_KZ, _ZMM, _ZMM | M_1to16 | _MEM },
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@ -983,137 +986,137 @@ public:
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{ "vpminud", ZMM_KZ, _ZMM, _ZMM | _MEM | M_1to16 },
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{ "vpminuq", ZMM_KZ, _ZMM, _ZMM | _MEM | M_1to8 },
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{ "vpslldq", _XMM3, _XMM3 | _MEM, IMM8 },
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{ "vpslldq", XMM, _XMM3 | _MEM, IMM8 },
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{ "vpslldq", _YMM3, _YMM3 | _MEM, IMM8 },
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{ "vpslldq", _ZMM, _ZMM | _MEM, IMM8 },
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{ "vpsrldq", _XMM3, _XMM3 | _MEM, IMM8 },
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{ "vpsrldq", XMM, _XMM3 | _MEM, IMM8 },
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{ "vpsrldq", _YMM3, _YMM3 | _MEM, IMM8 },
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{ "vpsrldq", _ZMM, _ZMM | _MEM, IMM8 },
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{ "vpsraw", XMM_KZ, _XMM | _MEM, IMM8 },
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{ "vpsraw", XMM_KZ, XMM | _MEM, IMM8 },
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{ "vpsraw", ZMM_KZ, _ZMM | _MEM, IMM8 },
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{ "vpsrad", XMM_KZ, _XMM | M_1to4 | _MEM, IMM8 },
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{ "vpsrad", XMM_KZ, XMM | M_1to4 | _MEM, IMM8 },
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{ "vpsrad", ZMM_KZ, _ZMM | M_1to16 | _MEM, IMM8 },
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{ "vpsraq", XMM, XMM, IMM8 },
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{ "vpsraq", XMM_KZ, _XMM | M_1to2 | _MEM, IMM8 },
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{ "vpsraq", XMM_KZ, XMM | M_1to2 | _MEM, IMM8 },
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{ "vpsraq", ZMM_KZ, _ZMM | M_1to8 | _MEM, IMM8 },
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{ "vpsllw", _XMM3, _XMM3 | _MEM, IMM8 },
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{ "vpslld", _XMM3, _XMM3 | _MEM | M_1to4, IMM8 },
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{ "vpsllq", _XMM3, _XMM3 | _MEM | M_1to2, IMM8 },
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{ "vpsllw", XMM, _XMM3 | _MEM, IMM8 },
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||||
{ "vpslld", XMM, _XMM3 | _MEM | M_1to4, IMM8 },
|
||||
{ "vpsllq", XMM, _XMM3 | _MEM | M_1to2, IMM8 },
|
||||
|
||||
{ "vpsrlw", XMM_KZ, _XMM | _MEM, IMM8 },
|
||||
{ "vpsrlw", XMM_KZ, XMM | _MEM, IMM8 },
|
||||
{ "vpsrlw", ZMM_KZ, _ZMM | _MEM, IMM8 },
|
||||
|
||||
{ "vpsrld", XMM_KZ, _XMM | M_1to4 | _MEM, IMM8 },
|
||||
{ "vpsrld", XMM_KZ, XMM | M_1to4 | _MEM, IMM8 },
|
||||
{ "vpsrld", ZMM_KZ, _ZMM | M_1to16 | _MEM, IMM8 },
|
||||
|
||||
{ "vpsrlq", _XMM3, _XMM3 | _MEM | M_1to2, IMM8 },
|
||||
{ "vpsrlq", XMM, _XMM3 | _MEM | M_1to2, IMM8 },
|
||||
{ "vpsrlq", _ZMM, _ZMM | _MEM | M_1to8, IMM8 },
|
||||
|
||||
{ "vpsravw", XMM_KZ | _XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsravw", XMM_KZ | XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsravw", _ZMM, _ZMM, _MEM },
|
||||
|
||||
{ "vpsravd", XMM_KZ | _XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsravd", XMM_KZ | XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsravd", _ZMM, _ZMM, M_1to16 | _MEM },
|
||||
|
||||
{ "vpsravq", XMM_KZ | _XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsravq", XMM_KZ | XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsravq", _ZMM, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vpsllvw", XMM_KZ | _XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsllvw", XMM_KZ | XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsllvw", _ZMM, _ZMM, _MEM },
|
||||
|
||||
{ "vpsllvd", XMM_KZ | _XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsllvd", XMM_KZ | XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsllvd", _ZMM, _ZMM, M_1to16 | _MEM },
|
||||
|
||||
{ "vpsllvq", XMM_KZ | _XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsllvq", XMM_KZ | XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsllvq", _ZMM, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vpsrlvw", XMM_KZ | _XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsrlvw", XMM_KZ | XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsrlvw", _ZMM, _ZMM, _MEM },
|
||||
|
||||
{ "vpsrlvd", XMM_KZ | _XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsrlvd", XMM_KZ | XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsrlvd", _ZMM, _ZMM, M_1to16 | _MEM },
|
||||
|
||||
{ "vpsrlvq", XMM_KZ | _XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsrlvq", XMM_KZ | XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsrlvq", _ZMM, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vpshufb", _XMM | XMM_KZ, _XMM, _XMM | _MEM },
|
||||
{ "vpshufb", XMM | XMM_KZ, _XMM, _XMM | _MEM },
|
||||
{ "vpshufb", ZMM_KZ, _ZMM, _MEM },
|
||||
|
||||
{ "vpshufhw", _XMM | XMM_KZ, _XMM | _MEM, IMM8 },
|
||||
{ "vpshufhw", XMM | XMM_KZ, _XMM | _MEM, IMM8 },
|
||||
{ "vpshufhw", ZMM_KZ, _MEM, IMM8 },
|
||||
|
||||
{ "vpshuflw", _XMM | XMM_KZ, _XMM | _MEM, IMM8 },
|
||||
{ "vpshuflw", XMM | XMM_KZ, _XMM | _MEM, IMM8 },
|
||||
{ "vpshuflw", ZMM_KZ, _MEM, IMM8 },
|
||||
|
||||
{ "vpshufd", _XMM | XMM_KZ, _XMM | M_1to4 | _MEM, IMM8 },
|
||||
{ "vpshufd", XMM | XMM_KZ, _XMM | M_1to4 | _MEM, IMM8 },
|
||||
{ "vpshufd", _ZMM | ZMM_KZ, _ZMM | M_1to16 | _MEM, IMM8 },
|
||||
|
||||
{ "vpord", _XMM | XMM_KZ, _XMM, _XMM | M_1to4 | _MEM },
|
||||
{ "vpord", XMM | XMM_KZ, _XMM, _XMM | M_1to4 | _MEM },
|
||||
{ "vpord", _ZMM | ZMM_KZ, _ZMM, M_1to16 | _MEM },
|
||||
|
||||
{ "vporq", _XMM | XMM_KZ, _XMM, _XMM | M_1to2 | _MEM },
|
||||
{ "vporq", XMM | XMM_KZ, _XMM, _XMM | M_1to2 | _MEM },
|
||||
{ "vporq", _ZMM | ZMM_KZ, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vpxord", _XMM | XMM_KZ, _XMM, _XMM | M_1to4 | _MEM },
|
||||
{ "vpxord", XMM | XMM_KZ, _XMM, _XMM | M_1to4 | _MEM },
|
||||
{ "vpxord", _ZMM | ZMM_KZ, _ZMM, M_1to16 | _MEM },
|
||||
|
||||
{ "vpxorq", _XMM | XMM_KZ, _XMM, _XMM | M_1to2 | _MEM },
|
||||
{ "vpxorq", XMM | XMM_KZ, _XMM, _XMM | M_1to2 | _MEM },
|
||||
{ "vpxorq", _ZMM | ZMM_KZ, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vpsadbw", _XMM3, _XMM, _XMM | _MEM },
|
||||
{ "vpsadbw", XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpsadbw", _ZMM, _ZMM, _MEM },
|
||||
|
||||
{ "vpmuldq", _XMM3, _XMM, _XMM | M_1to2 | _MEM },
|
||||
{ "vpmuldq", XMM, _XMM, _XMM | M_1to2 | _MEM },
|
||||
{ "vpmuldq", ZMM_KZ, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vpmulhrsw", _XMM3, _XMM, _XMM | _MEM },
|
||||
{ "vpmulhrsw", XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpmulhrsw", ZMM_KZ, _ZMM, _MEM },
|
||||
|
||||
{ "vpmulhuw", _XMM3, _XMM, _XMM | _MEM },
|
||||
{ "vpmulhuw", XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpmulhuw", ZMM_KZ, _ZMM, _MEM },
|
||||
|
||||
{ "vpmulhw", _XMM3, _XMM, _XMM | _MEM },
|
||||
{ "vpmulhw", XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpmulhw", ZMM_KZ, _ZMM, _MEM },
|
||||
|
||||
{ "vpmullw", _XMM3, _XMM, _XMM | _MEM },
|
||||
{ "vpmullw", XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpmullw", ZMM_KZ, _ZMM, _MEM },
|
||||
|
||||
{ "vpmulld", _XMM3, _XMM, M_1to4 | _MEM },
|
||||
{ "vpmulld", XMM, _XMM, M_1to4 | _MEM },
|
||||
{ "vpmulld", ZMM_KZ, _ZMM, M_1to16 | _MEM },
|
||||
|
||||
{ "vpmullq", _XMM3, _XMM, M_1to2 | _MEM },
|
||||
{ "vpmullq", XMM, _XMM, M_1to2 | _MEM },
|
||||
{ "vpmullq", ZMM_KZ, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vpmuludq", _XMM3, _XMM, M_1to2 | _MEM },
|
||||
{ "vpmuludq", XMM, _XMM, M_1to2 | _MEM },
|
||||
{ "vpmuludq", ZMM_KZ, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vpunpckhbw", _XMM3, _XMM, _XMM | _MEM },
|
||||
{ "vpunpckhbw", XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpunpckhbw", _ZMM, _ZMM, _MEM },
|
||||
|
||||
{ "vpunpckhwd", _XMM3, _XMM, _XMM | _MEM },
|
||||
{ "vpunpckhwd", XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpunpckhwd", _ZMM, _ZMM, _MEM },
|
||||
|
||||
{ "vpunpckhdq", _XMM3, _XMM, M_1to4 | _MEM },
|
||||
{ "vpunpckhdq", XMM, _XMM, M_1to4 | _MEM },
|
||||
{ "vpunpckhdq", _ZMM, _ZMM, M_1to16 | _MEM },
|
||||
|
||||
{ "vpunpckhqdq", _XMM3, _XMM, M_1to2 | _MEM },
|
||||
{ "vpunpckhqdq", XMM, _XMM, M_1to2 | _MEM },
|
||||
{ "vpunpckhqdq", _ZMM, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vpunpcklbw", _XMM3, _XMM, _XMM | _MEM },
|
||||
{ "vpunpcklbw", XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpunpcklbw", _ZMM, _ZMM, _MEM },
|
||||
|
||||
{ "vpunpcklwd", _XMM3, _XMM, _XMM | _MEM },
|
||||
{ "vpunpcklwd", XMM, _XMM, _XMM | _MEM },
|
||||
{ "vpunpcklwd", _ZMM, _ZMM, _MEM },
|
||||
|
||||
{ "vpunpckldq", _XMM3, _XMM, M_1to4 | _MEM },
|
||||
{ "vpunpckldq", XMM, _XMM, M_1to4 | _MEM },
|
||||
{ "vpunpckldq", _ZMM, _ZMM, M_1to16 | _MEM },
|
||||
|
||||
{ "vpunpcklqdq", _XMM3, _XMM, M_1to2 | _MEM },
|
||||
{ "vpunpcklqdq", XMM, _XMM, M_1to2 | _MEM },
|
||||
{ "vpunpcklqdq", _ZMM, _ZMM, M_1to8 | _MEM },
|
||||
|
||||
{ "vextractf32x4", _XMM | XMM_KZ | _MEM, _YMM | _ZMM, IMM8 },
|
||||
|
|
@ -1126,7 +1129,7 @@ public:
|
|||
{ "vextracti32x8", _YMM | YMM_KZ | _MEM, _ZMM, IMM8 },
|
||||
{ "vextracti64x4", _YMM | YMM_KZ | _MEM, _ZMM, IMM8 },
|
||||
|
||||
{ "vextractps", REG32 | _MEM, _XMM3, IMM8 },
|
||||
{ "vextractps", REG32 | _MEM, XMM, IMM8 },
|
||||
|
||||
{ "vpermb", XMM_KZ, _XMM, _XMM | _MEM },
|
||||
{ "vpermb", ZMM_KZ, _ZMM, _ZMM | _MEM },
|
||||
|
|
@ -1175,7 +1178,7 @@ public:
|
|||
uint64_t xm;
|
||||
} tbl[] = {
|
||||
#ifdef XBYAK64
|
||||
{ "vinsertps", _XMM, _XMM, _XMM3 | _MEM },
|
||||
{ "vinsertps", XMM, _XMM, _XMM3 | _MEM },
|
||||
|
||||
{ "vshufpd", XMM_KZ, _XMM, M_1to2 | _MEM },
|
||||
{ "vshufpd", ZMM_KZ, _ZMM, M_1to8 | _MEM },
|
||||
|
|
@ -1208,14 +1211,14 @@ public:
|
|||
put(p.name, p.x1, p.x2, p.xm, IMM8);
|
||||
}
|
||||
#ifdef XBYAK64
|
||||
put("vpextrb", _REG64 | _MEM, _XMM3, IMM8);
|
||||
put("vpextrw", _REG64 | _MEM, _XMM3, IMM8);
|
||||
put("vpextrd", _REG32 | _MEM, _XMM3, IMM8);
|
||||
put("vpextrq", _REG64 | _MEM, _XMM3, IMM8);
|
||||
put("vpinsrb", _XMM3, _XMM3, _REG32 | _MEM, IMM8);
|
||||
put("vpinsrw", _XMM3, _XMM3, _REG32 | _MEM, IMM8);
|
||||
put("vpinsrd", _XMM3, _XMM3, _REG32 | _MEM, IMM8);
|
||||
put("vpinsrq", _XMM3, _XMM3, _REG64 | _MEM, IMM8);
|
||||
put("vpextrb", _REG64 | _MEM, XMM, IMM8);
|
||||
put("vpextrw", _REG64 | _MEM, XMM, IMM8);
|
||||
put("vpextrd", _REG32 | _MEM, XMM, IMM8);
|
||||
put("vpextrq", _REG64 | _MEM, XMM, IMM8);
|
||||
put("vpinsrb", XMM, _XMM3, _REG32 | _MEM, IMM8);
|
||||
put("vpinsrw", XMM, _XMM3, _REG32 | _MEM, IMM8);
|
||||
put("vpinsrd", XMM, _XMM3, _REG32 | _MEM, IMM8);
|
||||
put("vpinsrq", XMM, _XMM3, _REG64 | _MEM, IMM8);
|
||||
#endif
|
||||
}
|
||||
void put512_FMA()
|
||||
|
|
@ -1345,7 +1348,7 @@ public:
|
|||
} else if (suf == "ps") {
|
||||
mem = M_1to4;
|
||||
}
|
||||
put(p, _XMM3 | XMM_KZ, _XMM, mem | _MEM);
|
||||
put(p, XMM | XMM_KZ, _XMM, mem | _MEM);
|
||||
if (!sufTbl[j].supportYMM) continue;
|
||||
mem = 0;
|
||||
if (suf == "pd") {
|
||||
|
|
@ -1466,23 +1469,23 @@ public:
|
|||
put("vcvtqq2ps", XMM_KZ, _YMM | M_yword | MY_1to4);
|
||||
put("vcvtqq2ps", YMM_KZ, ZMM | _MEM | M_1to8 | ZMM_ER);
|
||||
|
||||
put("vcvtsd2si", REG32 | REG64, _XMM3 | _MEM | XMM_ER);
|
||||
put("vcvtsd2si", REG32 | REG64, XMM | _MEM | XMM_ER);
|
||||
|
||||
put("vcvtsd2usi", REG32 | REG64, _XMM3 | _MEM | XMM_ER);
|
||||
put("vcvtsd2usi", REG32 | REG64, XMM | _MEM | XMM_ER);
|
||||
|
||||
put("vcvtsd2ss", XMM_KZ, _XMM3, _XMM3 | _MEM | XMM_ER);
|
||||
put("vcvtsd2ss", XMM_KZ, XMM, _XMM3 | _MEM | XMM_ER);
|
||||
|
||||
put("vcvtsi2sd", _XMM3, _XMM3, REG32 | REG64 | MEM32 | MEM64);
|
||||
put("vcvtsi2sd", XMM, _XMM3, REG32 | REG64 | MEM32 | MEM64);
|
||||
put("vcvtsi2sd", XMM, XMM_ER, REG64);
|
||||
|
||||
put("vcvtsi2ss", _XMM3, _XMM3, REG32 | REG64 | MEM32 | MEM64);
|
||||
put("vcvtsi2ss", XMM, _XMM3, REG32 | REG64 | MEM32 | MEM64);
|
||||
put("vcvtsi2ss", XMM, XMM_ER, REG32 | REG64);
|
||||
|
||||
put("vcvtss2sd", XMM_KZ, _XMM3, _XMM3 | _MEM | XMM_SAE);
|
||||
put("vcvtss2sd", XMM_KZ, XMM, _XMM3 | _MEM | XMM_SAE);
|
||||
|
||||
put("vcvtss2si", REG32 | REG64, _XMM3 | _MEM | XMM_ER);
|
||||
put("vcvtss2si", REG32 | REG64, XMM | _MEM | XMM_ER);
|
||||
|
||||
put("vcvtss2usi", REG32 | REG64, _XMM3 | _MEM | XMM_ER);
|
||||
put("vcvtss2usi", REG32 | REG64, XMM | _MEM | XMM_ER);
|
||||
|
||||
put("vcvtpd2dq", XMM_KZ, _XMM | M_xword | M_1to2);
|
||||
put("vcvtpd2dq", XMM_KZ, _YMM | M_yword | MY_1to4);
|
||||
|
|
@ -1516,13 +1519,13 @@ public:
|
|||
put("vcvttps2uqq", YMM_KZ, _XMM | _MEM | M_1to4);
|
||||
put("vcvttps2uqq", ZMM_KZ, _YMM | _MEM | M_1to8 | YMM_SAE);
|
||||
|
||||
put("vcvttsd2si", REG32 | REG64, _XMM3 | _MEM | XMM_SAE);
|
||||
put("vcvttsd2si", REG32 | REG64, XMM | _MEM | XMM_SAE);
|
||||
|
||||
put("vcvttsd2usi", REG32 | REG64, _XMM3 | _MEM | XMM_SAE);
|
||||
put("vcvttsd2usi", REG32 | REG64, XMM | _MEM | XMM_SAE);
|
||||
|
||||
put("vcvttss2si", REG32 | REG64, _XMM3 | _MEM | XMM_SAE);
|
||||
put("vcvttss2si", REG32 | REG64, XMM | _MEM | XMM_SAE);
|
||||
|
||||
put("vcvttss2usi", REG32 | REG64, _XMM3 | _MEM | XMM_SAE);
|
||||
put("vcvttss2usi", REG32 | REG64, XMM | _MEM | XMM_SAE);
|
||||
|
||||
put("vcvtudq2pd", XMM_KZ, _XMM | _MEM | M_1to2);
|
||||
put("vcvtudq2pd", YMM_KZ, _XMM | _MEM | M_1to4);
|
||||
|
|
@ -1540,10 +1543,10 @@ public:
|
|||
put("vcvtuqq2ps", XMM_KZ, _YMM | M_yword | MY_1to4);
|
||||
put("vcvtuqq2ps", YMM_KZ, ZMM | _MEM | M_1to8 | ZMM_ER);
|
||||
|
||||
put("vcvtusi2sd", _XMM3, _XMM3, REG32 | REG64 | MEM32 | MEM64);
|
||||
put("vcvtusi2sd", XMM, _XMM3, REG32 | REG64 | MEM32 | MEM64);
|
||||
put("vcvtusi2sd", XMM, XMM_ER, REG64);
|
||||
|
||||
put("vcvtusi2ss", _XMM3, _XMM3, REG32 | REG64 | MEM32 | MEM64);
|
||||
put("vcvtusi2ss", XMM, _XMM3, REG32 | REG64 | MEM32 | MEM64);
|
||||
put("vcvtusi2ss", XMM, XMM_ER, REG32 | REG64);
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue