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Reorganise src/frontend: Add subdirectories disassembler and translate
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MerryMage
parent
9b2aff166a
commit
07eaf100ba
15 changed files with 19 additions and 35 deletions
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/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "common/assert.h"
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#include "frontend/ir_emitter.h"
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namespace Dynarmic {
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namespace Arm {
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void IREmitter::Unimplemented() {
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}
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u32 IREmitter::PC() {
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u32 offset = current_location.TFlag ? 4 : 8;
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return current_location.arm_pc + offset;
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}
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u32 IREmitter::AlignPC(size_t alignment) {
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u32 pc = PC();
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return static_cast<u32>(pc - pc % alignment);
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}
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IR::ValuePtr IREmitter::Imm1(bool value) {
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auto imm1 = std::make_shared<IR::ImmU1>(value);
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AddToBlock(imm1);
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return imm1;
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}
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IR::ValuePtr IREmitter::Imm8(u8 i) {
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auto imm8 = std::make_shared<IR::ImmU8>(i);
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AddToBlock(imm8);
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return imm8;
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}
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IR::ValuePtr IREmitter::Imm32(u32 i) {
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auto imm32 = std::make_shared<IR::ImmU32>(i);
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AddToBlock(imm32);
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return imm32;
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}
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IR::ValuePtr IREmitter::GetRegister(Reg reg) {
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if (reg == Reg::PC) {
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return Imm32(PC());
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}
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return Inst(IR::Opcode::GetRegister, { RegRef(reg) });
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}
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void IREmitter::SetRegister(const Reg reg, IR::ValuePtr value) {
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ASSERT(reg != Reg::PC);
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Inst(IR::Opcode::SetRegister, { RegRef(reg), value });
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}
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void IREmitter::ALUWritePC(IR::ValuePtr value) {
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// This behaviour is ARM version-dependent.
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// The below implementation is for ARMv6k
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if (!current_location.TFlag) {
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auto new_pc = And(value, Imm32(0xFFFFFFFC));
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Inst(IR::Opcode::SetRegister, { RegRef(Reg::PC), new_pc });
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} else {
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auto new_pc = And(value, Imm32(0xFFFFFFFE));
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Inst(IR::Opcode::SetRegister, { RegRef(Reg::PC), new_pc });
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}
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}
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void IREmitter::LoadWritePC(IR::ValuePtr value) {
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// This behaviour is ARM version-dependent.
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// The below implementation is for ARMv6k
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Inst(IR::Opcode::BXWritePC, {value});
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}
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void IREmitter::CallSupervisor(IR::ValuePtr value) {
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Inst(IR::Opcode::CallSupervisor, {value});
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}
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IR::ValuePtr IREmitter::GetCFlag() {
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return Inst(IR::Opcode::GetCFlag, {});
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}
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void IREmitter::SetNFlag(IR::ValuePtr value) {
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Inst(IR::Opcode::SetNFlag, {value});
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}
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void IREmitter::SetZFlag(IR::ValuePtr value) {
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Inst(IR::Opcode::SetZFlag, {value});
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}
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void IREmitter::SetCFlag(IR::ValuePtr value) {
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Inst(IR::Opcode::SetCFlag, {value});
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}
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void IREmitter::SetVFlag(IR::ValuePtr value) {
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Inst(IR::Opcode::SetVFlag, {value});
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}
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IR::ValuePtr IREmitter::LeastSignificantHalf(IR::ValuePtr value) {
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return Inst(IR::Opcode::LeastSignificantHalf, {value});
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}
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IR::ValuePtr IREmitter::LeastSignificantByte(IR::ValuePtr value) {
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return Inst(IR::Opcode::LeastSignificantByte, {value});
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}
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IR::ValuePtr IREmitter::MostSignificantBit(IR::ValuePtr value) {
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return Inst(IR::Opcode::MostSignificantBit, {value});
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}
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IR::ValuePtr IREmitter::IsZero(IR::ValuePtr value) {
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return Inst(IR::Opcode::IsZero, {value});
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}
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IREmitter::ResultAndCarry IREmitter::LogicalShiftLeft(IR::ValuePtr value_in, IR::ValuePtr shift_amount, IR::ValuePtr carry_in) {
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auto result = Inst(IR::Opcode::LogicalShiftLeft, {value_in, shift_amount, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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return {result, carry_out};
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}
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IREmitter::ResultAndCarry IREmitter::LogicalShiftRight(IR::ValuePtr value_in, IR::ValuePtr shift_amount, IR::ValuePtr carry_in) {
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auto result = Inst(IR::Opcode::LogicalShiftRight, {value_in, shift_amount, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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return {result, carry_out};
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}
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IREmitter::ResultAndCarry IREmitter::ArithmeticShiftRight(IR::ValuePtr value_in, IR::ValuePtr shift_amount, IR::ValuePtr carry_in) {
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auto result = Inst(IR::Opcode::ArithmeticShiftRight, {value_in, shift_amount, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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return {result, carry_out};
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}
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IREmitter::ResultAndCarry IREmitter::RotateRight(IR::ValuePtr value_in, IR::ValuePtr shift_amount, IR::ValuePtr carry_in) {
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auto result = Inst(IR::Opcode::RotateRight, {value_in, shift_amount, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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return {result, carry_out};
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}
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IREmitter::ResultAndCarryAndOverflow IREmitter::AddWithCarry(IR::ValuePtr a, IR::ValuePtr b, IR::ValuePtr carry_in) {
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auto result = Inst(IR::Opcode::AddWithCarry, {a, b, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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auto overflow = Inst(IR::Opcode::GetOverflowFromOp, {result});
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return {result, carry_out, overflow};
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}
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IR::ValuePtr IREmitter::Add(IR::ValuePtr a, IR::ValuePtr b) {
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return Inst(IR::Opcode::AddWithCarry, {a, b, Imm1(0)});
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}
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IREmitter::ResultAndCarryAndOverflow IREmitter::SubWithCarry(IR::ValuePtr a, IR::ValuePtr b, IR::ValuePtr carry_in) {
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// This is equivalent to AddWithCarry(a, Not(b), carry_in).
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auto result = Inst(IR::Opcode::SubWithCarry, {a, b, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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auto overflow = Inst(IR::Opcode::GetOverflowFromOp, {result});
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return {result, carry_out, overflow};
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}
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IR::ValuePtr IREmitter::And(IR::ValuePtr a, IR::ValuePtr b) {
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return Inst(IR::Opcode::And, {a, b});
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}
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IR::ValuePtr IREmitter::Eor(IR::ValuePtr a, IR::ValuePtr b) {
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return Inst(IR::Opcode::Eor, {a, b});
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}
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IR::ValuePtr IREmitter::Or(IR::ValuePtr a, IR::ValuePtr b) {
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return Inst(IR::Opcode::Or, {a, b});
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}
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IR::ValuePtr IREmitter::Not(IR::ValuePtr a) {
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return Inst(IR::Opcode::Not, {a});
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}
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IR::ValuePtr IREmitter::ReadMemory8(IR::ValuePtr vaddr) {
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return Inst(IR::Opcode::ReadMemory8, {vaddr});
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}
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IR::ValuePtr IREmitter::ReadMemory16(IR::ValuePtr vaddr) {
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return Inst(IR::Opcode::ReadMemory16, {vaddr});
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}
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IR::ValuePtr IREmitter::ReadMemory32(IR::ValuePtr vaddr) {
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return Inst(IR::Opcode::ReadMemory32, {vaddr});
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}
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IR::ValuePtr IREmitter::ReadMemory64(IR::ValuePtr vaddr) {
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return Inst(IR::Opcode::ReadMemory64, {vaddr});
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}
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void IREmitter::WriteMemory8(IR::ValuePtr vaddr, IR::ValuePtr value) {
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Inst(IR::Opcode::WriteMemory8, {vaddr, value});
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}
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void IREmitter::WriteMemory16(IR::ValuePtr vaddr, IR::ValuePtr value) {
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Inst(IR::Opcode::WriteMemory16, {vaddr, value});
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}
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void IREmitter::WriteMemory32(IR::ValuePtr vaddr, IR::ValuePtr value) {
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Inst(IR::Opcode::WriteMemory32, {vaddr, value});
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}
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void IREmitter::WriteMemory64(IR::ValuePtr vaddr, IR::ValuePtr value) {
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Inst(IR::Opcode::WriteMemory64, {vaddr, value});
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}
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void IREmitter::SetTerm(const IR::Terminal& terminal) {
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ASSERT_MSG(block.terminal.which() == 0, "Terminal has already been set.");
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block.terminal = terminal;
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}
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IR::ValuePtr IREmitter::Inst(IR::Opcode op, std::initializer_list<IR::ValuePtr> args) {
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auto inst = std::make_shared<IR::Inst>(op);
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assert(args.size() == inst->NumArgs());
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std::for_each(args.begin(), args.end(), [&inst, op, index = size_t(0)](const auto& v) mutable {
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assert(IR::GetArgTypeOf(op, index) == v->GetType());
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inst->SetArg(index, v);
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index++;
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});
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AddToBlock(inst);
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return inst;
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}
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IR::ValuePtr IREmitter::RegRef(Reg reg) {
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auto regref = std::make_shared<IR::ImmRegRef>(reg);
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AddToBlock(regref);
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return regref;
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}
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void IREmitter::AddToBlock(IR::ValuePtr value) {
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block.instructions.emplace_back(value);
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}
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} // namespace Arm
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} // namespace Dynarmic
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