mirror of
https://git.suyu.dev/suyu/dynarmic.git
synced 2026-01-05 22:18:16 +01:00
A64: Implement SMOV
This commit is contained in:
parent
5297027ebe
commit
0642d49919
2 changed files with 19 additions and 1 deletions
|
|
@ -36,6 +36,24 @@ bool TranslatorVisitor::DUP_gen(bool Q, Imm<5> imm5, Reg Rn, Vec Vd) {
|
|||
return true;
|
||||
}
|
||||
|
||||
bool TranslatorVisitor::SMOV(bool Q, Imm<5> imm5, Vec Vn, Reg Rd) {
|
||||
const size_t size = Common::LowestSetBit(imm5.ZeroExtend());
|
||||
if (size == 2 && !Q) return UnallocatedEncoding();
|
||||
if (size > 2) return UnallocatedEncoding();
|
||||
|
||||
const size_t idxdsize = imm5.Bit<4>() ? 128 : 64;
|
||||
const size_t index = imm5.ZeroExtend<size_t>() >> (size + 1);
|
||||
const size_t esize = 8 << size;
|
||||
const size_t datasize = Q ? 64 : 32;
|
||||
|
||||
const IR::U128 operand = V(idxdsize, Vn);
|
||||
|
||||
const IR::UAny elem = ir.VectorGetElement(esize, operand, index);
|
||||
X(datasize, Rd, SignExtend(elem, datasize));
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool TranslatorVisitor::UMOV(bool Q, Imm<5> imm5, Vec Vn, Reg Rd) {
|
||||
const size_t size = Common::LowestSetBit(imm5.ZeroExtend());
|
||||
if (size < 3 && Q) return UnallocatedEncoding();
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue