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Adding support for mips.

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Support for mips cpu is added to all breakapad targets including unittests.

BUG=none
TEST=unittests

Review URL: https://breakpad.appspot.com/614002



git-svn-id: http://google-breakpad.googlecode.com/svn/trunk@1212 4c0a9323-5329-0410-9bdc-e9ce6186880e
This commit is contained in:
gordana.cmiljanovic@imgtec.com 2013-09-11 11:37:04 +00:00
parent ae35566b8d
commit f78839c157
31 changed files with 2095 additions and 39 deletions
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36
src/processor/synth_minidump.cc
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@ -195,6 +195,42 @@ Context::Context(const Dump &dump, const MDRawContextARM &context)
assert(Size() == sizeof(MDRawContextARM));
}
Context::Context(const Dump &dump, const MDRawContextMIPS &context)
: Section(dump) {
// The caller should have properly set the CPU type flag.
assert(context.context_flags & MD_CONTEXT_MIPS);
D32(context.context_flags);
D32(context._pad0);
for (int i = 0; i < MD_CONTEXT_MIPS_GPR_COUNT; ++i)
D64(context.iregs[i]);
D64(context.mdhi);
D64(context.mdlo);
for (int i = 0; i < MD_CONTEXT_MIPS_DSP_COUNT; ++i)
D32(context.hi[i]);
for (int i = 0; i < MD_CONTEXT_MIPS_DSP_COUNT; ++i)
D32(context.lo[i]);
D32(context.dsp_control);
D32(context._pad1);
D64(context.epc);
D64(context.badvaddr);
D32(context.status);
D32(context.cause);
for (int i = 0; i < MD_FLOATINGSAVEAREA_MIPS_FPR_COUNT; ++i)
D64(context.float_save.regs[i]);
D32(context.float_save.fpcsr);
D32(context.float_save.fir);
assert(Size() == sizeof(MDRawContextMIPS));
}
Thread::Thread(const Dump &dump,
uint32_t thread_id, const Memory &stack, const Context &context,
uint32_t suspend_count, uint32_t priority_class,